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MMBZ5V6ALT1G-N

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BORN ESD Protection Devices, SOT-23. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componenttvs-fuse-board level protectionmmbz5v6alt1g-nfactory-2.0.0extractor-text

Verified MMBZ5V6ALT1G-N

by Ray · last 6 Nov 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

6 Nov 2026RayPublished by the parts factory: tier lcsc, 3 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: MMBZ5V6ALT1G-N · SOT-23 · 3 pins
  • ✓copper: 3 copper pads, none touching another net
  • ✓datasheet: all 3 pin names found in the 4-page datasheet
  • •distributor (warn): no ['digikey', 'mouser'] number
  • ✓family: SOT-23
  • ✓files: 6 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-wwo5sqdj/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 1 records
  • •package_fit (skip): no component.package_dims on the page: the model is unchecked against the datasheet drawing
  • ✓pads: 3 pins = 3 pads
  • ✓pose: 1 STEP(s) Z-up, seated, centred
  • ✓symbol: 3 pins agree
  • ✓symbol_text: no pin names collide
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ mmbz5v6alt1g-n.kicad_sym✓ mmbz5v6alt1g-n.kicad_mod✓ mmbz5v6alt1g-n.step
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Ray Publish 0.1.0 2f4c9c1 3d ago

MMBZ5V6ALT1G-N

BORN · ESD Protection Devices · SOT-23

MMBZ5V6ALT1G-N from BORN, in a SOT-23. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1 passive Protected line terminal of the unidirectional ESD diode array, measured to pin 3 with a junction capacitance of 200 pF max (VR=0V, f=1MHz).
2 2 passive Second protected line terminal of the ESD diode array, measured to pin 3 with a junction capacitance of 200 pF max (VR=0V, f=1MHz).
3 3 passive Common terminal of the diode array, which is the reference for pin 1 and pin 2 in the capacitance specification (VRWM 3.3 V, VBR 4.0 to 8.0 V at 1 mA).

Key specifications

Parameter Value
Manufacturer BORN
Package SOT-23
Category TVS/Fuse/Board Level Protection
Pins 3

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Reverse Breakdown Voltage VBR 4 6.5 8 V IT=1mA 2
Peak Pulse Power PPP 350 Watts tp=8/20μs 2
Peak Pulse Current Ipp 20 A tp=8/20μs (note1) 2
ESD per IEC 61000-4-2 (Air) VESD 30 kV ESD per IEC 61000-4-2 (Air) 2
ESD per IEC 61000-4-2 (Contact) VESD 30 kV ESD per IEC 61000-4-2 (Contact) 2
Lead Soldering Temperature TL 260 ℃ 10 seconds 2
Junction Temperature TJ -55 125 ℃ 2
Storage Temperature Tstg -55 125 ℃ 2

CAD (KiCad official)

  • Symbol: MMBZ5V6ALT1G-N
  • Footprint: Package_TO_SOT_SMD:SOT-23
  • 3D model: SOT-23 (KiCad packages3D, STEP)

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: BORN datasheet (4 pp, sha256 7b1a21ebdfb862a2, retrieved 2026-11-06, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF