component
MM74HCT240MTCX
Public Made by Adomby adom
onsemi Logic ICs, TSSOP-20. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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MM74HCT240MTCX
onsemi · Logic ICs · TSSOP-20
MM74HCT240MTCX from onsemi, in a TSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1G | input | Active-low 3-STATE enable for the 1Y1-1Y4 outputs, TTL-compatible input with VIH min 2.0 V and VIL max 0.8 V. |
| 2 | 1A1 | input | Buffer input 1A1, TTL-compatible with VIH min 2.0 V and VIL max 0.8 V, inverted to 1Y1. |
| 3 | 2Y4 | tri_state | Inverting 3-STATE output for 2A4, high-impedance when 2G is high, with 6 mA (min) output drive. |
| 4 | 1A2 | input | Buffer input 1A2, TTL-compatible with VIH min 2.0 V and VIL max 0.8 V, inverted to 1Y2. |
| 5 | 2Y3 | tri_state | Inverting 3-STATE output for 2A3, high-impedance when 2G is high, with 6 mA (min) output drive. |
| 6 | 1A3 | input | Buffer input 1A3, TTL-compatible with VIH min 2.0 V and VIL max 0.8 V, inverted to 1Y3. |
| 7 | 2Y2 | tri_state | Inverting 3-STATE output for 2A2, high-impedance when 2G is high, with 6 mA (min) output drive. |
| 8 | 1A4 | input | Buffer input 1A4, TTL-compatible with VIH min 2.0 V and VIL max 0.8 V, inverted to 1Y4. |
| 9 | 2Y1 | tri_state | Inverting 3-STATE output for 2A1, high-impedance when 2G is high, with 6 mA (min) output drive. |
| 10 | GND | power_in | Ground reference; absolute maximum VCC or GND current is ±70 mA per pin. |
| 11 | 2A1 | input | Buffer input 2A1, TTL-compatible with VIH min 2.0 V and VIL max 0.8 V, inverted to 2Y1. |
| 12 | 1Y4 | tri_state | Inverting 3-STATE output for 1A4, high-impedance when 1G is high, with 6 mA (min) output drive. |
| 13 | 2A2 | input | Buffer input 2A2, TTL-compatible with VIH min 2.0 V and VIL max 0.8 V, inverted to 2Y2. |
| 14 | 1Y3 | tri_state | Inverting 3-STATE output for 1A3, high-impedance when 1G is high, with 6 mA (min) output drive. |
| 15 | 2A3 | input | Buffer input 2A3, TTL-compatible with VIH min 2.0 V and VIL max 0.8 V, inverted to 2Y3. |
| 16 | 1Y2 | tri_state | Inverting 3-STATE output for 1A2, high-impedance when 1G is high, with 6 mA (min) output drive. |
| 17 | 2A4 | input | Buffer input 2A4, TTL-compatible with VIH min 2.0 V and VIL max 0.8 V, inverted to 2Y4. |
| 18 | 1Y1 | tri_state | Inverting 3-STATE output for 1A1, high-impedance when 1G is high, with 6 mA (min) output drive. |
| 19 | 2G | input | Active-low 3-STATE enable for the 2Y1-2Y4 outputs, TTL-compatible input with VIH min 2.0 V and VIL max 0.8 V. |
| 20 | VCC | power_in | Positive supply, recommended operating range 4.5 V to 5.5 V (absolute maximum -0.5 to 7.0 V). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | onsemi |
| Package | TSSOP-20 |
| Category | Logic ICs |
| Pins | 20 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply Voltage (VCC) | VCC | 4.5 | 5.5 | V | 4 | ||
| Operating Temperature Range (TA) | TA | -40 | 85 | °C | 4 | ||
| Input Rise or Fall Times | tr, tf | 500 | ns | 4 | |||
| DC Input or Output Voltage | VIN, VOUT | 0 | V | max equals VCC | 4 | ||
| Supply Voltage (VCC) | VCC | -0.5 | 7 | V | 4 | ||
| DC Input Voltage | VIN | -1.5 | V | upper limit VCC+1.5 V | 4 | ||
| DC Output Voltage | VOUT | -0.5 | V | upper limit VCC+0.5 V | 4 | ||
| Clamp Diode Current | IIK, IOK | -20 | 20 | mA | 4 | ||
| DC Output Current, per pin | IOUT | -35 | 35 | mA | 4 | ||
| DC VCC or GND Current, per pin | ICC | -70 | 70 | mA | 4 | ||
| Storage Temperature Range | TSTG | -65 | 150 | °C | 4 | ||
| Power Dissipation | PD | 600 | mW | plastic N package (Note 3) | 4 | ||
| Power Dissipation | PD | 500 | mW | S.O. package only | 4 | ||
| Lead Temperature | TL | 260 | °C | soldering 10 seconds | 4 | ||
| Minimum HIGH Level Input Voltage | VIH | 2 | V | guaranteed limit at TA -40 to 85 C | 4 | ||
| Maximum LOW Level Input Voltage | VIL | 0.8 | V | guaranteed limit at TA -40 to 85 C | 4 | ||
| Minimum HIGH Level Output Voltage | VOH | 3.84 | 4.2 | V | /IOUT/ 6.0 mA, VCC 4.5V; VIN VIH or VIL | 4 | |
| Minimum HIGH Level Output Voltage | VOH | 4.84 | 5.2 | V | /IOUT/ 7.2 mA, VCC 5.5V; VIN VIH or VIL | 4 | |
| Maximum LOW Level Output Voltage | VOL | 0 | 0.1 | V | /IOUT/ 20 µA; VIN VIH or VIL | 4 | |
| Maximum LOW Level Output Voltage | VOL | 0.2 | 0.33 | V | /IOUT/ 6.0 mA, VCC 4.5V; VIN VIH or VIL | 4 | |
| Maximum Input Current | IIN | -0.5 | 0.05 | 0.5 | µA | VIN VCC or GND; VIH or VIL | 4 |
| Maximum 3-STATE Output Leakage Current | IOZ | -2.5 | 0.25 | 2.5 | µA | VOUT VCC or GND; G VIH or G VIL | 4 |
| Maximum Quiescent Supply Current | ICC | 4 | 40 | µA | VIN VCC or GND; IOUT 0 µA | 4 | |
| Maximum Quiescent Supply Current (TTL inputs) | ICC | 0.6 | 1.3 | mA | VIN 2.4V or 0.5V (Note 4) | 4 | |
| Maximum Propagation Delay | tPHL, tPLH | 14 | 25 | ns | CL 50 pF | 5 | |
| Maximum Propagation Delay | tPHL, tPLH | 20 | 35 | ns | CL 150 pF | 5 | |
| Maximum Output Enable Time | tPZH, tPZL | 21 | 38 | ns | RL 1 kΩ, CL 50 pF | 5 | |
| Maximum Output Enable Time | tPZH, tPZL | 26 | 53 | ns | RL 1 kΩ, CL 150 pF | 5 | |
| Maximum Output Disable Time | tPHZ, tPLZ | 16 | 32 | ns | RL 1 kΩ, CL 50 pF | 5 | |
| Maximum Output Rise and Fall Time | tTHL, tTLH | 6 | 15 | ns | CL 50 pF | 5 | |
| Maximum Input Capacitance | CIN | 10 | 15 | pF | 5 | ||
| Maximum Output Capacitance | COUT | 15 | 20 | pF | 5 |
CAD (KiCad official)
- Symbol:
MM74HCT240MTCX - Footprint:
Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm - 3D model: TSSOP-20 (KiCad packages3D, STEP)
- 3D model files:
mm74hct240mtcx-etched.step/mm74hct240mtcx-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);mm74hct240mtcx.step/mm74hct240mtcx.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: onsemi datasheet (10 pp, sha256
997baff6099f2ae7, retrieved 2026-10-27, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# MM74HCT240MTCX
**onsemi** · Logic ICs · TSSOP-20
MM74HCT240MTCX from onsemi, in a TSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1G | input | Active-low 3-STATE enable for the 1Y1-1Y4 outputs, TTL-compatible input with VIH min 2.0 V and VIL max 0.8 V. |
| 2 | 1A1 | input | Buffer input 1A1, TTL-compatible with VIH min 2.0 V and VIL max 0.8 V, inverted to 1Y1. |
| 3 | 2Y4 | tri_state | Inverting 3-STATE output for 2A4, high-impedance when 2G is high, with 6 mA (min) output drive. |
| 4 | 1A2 | input | Buffer input 1A2, TTL-compatible with VIH min 2.0 V and VIL max 0.8 V, inverted to 1Y2. |
| 5 | 2Y3 | tri_state | Inverting 3-STATE output for 2A3, high-impedance when 2G is high, with 6 mA (min) output drive. |
| 6 | 1A3 | input | Buffer input 1A3, TTL-compatible with VIH min 2.0 V and VIL max 0.8 V, inverted to 1Y3. |
| 7 | 2Y2 | tri_state | Inverting 3-STATE output for 2A2, high-impedance when 2G is high, with 6 mA (min) output drive. |
| 8 | 1A4 | input | Buffer input 1A4, TTL-compatible with VIH min 2.0 V and VIL max 0.8 V, inverted to 1Y4. |
| 9 | 2Y1 | tri_state | Inverting 3-STATE output for 2A1, high-impedance when 2G is high, with 6 mA (min) output drive. |
| 10 | GND | power_in | Ground reference; absolute maximum VCC or GND current is ±70 mA per pin. |
| 11 | 2A1 | input | Buffer input 2A1, TTL-compatible with VIH min 2.0 V and VIL max 0.8 V, inverted to 2Y1. |
| 12 | 1Y4 | tri_state | Inverting 3-STATE output for 1A4, high-impedance when 1G is high, with 6 mA (min) output drive. |
| 13 | 2A2 | input | Buffer input 2A2, TTL-compatible with VIH min 2.0 V and VIL max 0.8 V, inverted to 2Y2. |
| 14 | 1Y3 | tri_state | Inverting 3-STATE output for 1A3, high-impedance when 1G is high, with 6 mA (min) output drive. |
| 15 | 2A3 | input | Buffer input 2A3, TTL-compatible with VIH min 2.0 V and VIL max 0.8 V, inverted to 2Y3. |
| 16 | 1Y2 | tri_state | Inverting 3-STATE output for 1A2, high-impedance when 1G is high, with 6 mA (min) output drive. |
| 17 | 2A4 | input | Buffer input 2A4, TTL-compatible with VIH min 2.0 V and VIL max 0.8 V, inverted to 2Y4. |
| 18 | 1Y1 | tri_state | Inverting 3-STATE output for 1A1, high-impedance when 1G is high, with 6 mA (min) output drive. |
| 19 | 2G | input | Active-low 3-STATE enable for the 2Y1-2Y4 outputs, TTL-compatible input with VIH min 2.0 V and VIL max 0.8 V. |
| 20 | VCC | power_in | Positive supply, recommended operating range 4.5 V to 5.5 V (absolute maximum -0.5 to 7.0 V). |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | onsemi |
| Package | TSSOP-20 |
| Category | Logic ICs |
| Pins | 20 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply Voltage (VCC) | VCC | 4.5 | | 5.5 | V | | 4 |
| Operating Temperature Range (TA) | TA | -40 | | 85 | °C | | 4 |
| Input Rise or Fall Times | tr, tf | | | 500 | ns | | 4 |
| DC Input or Output Voltage | VIN, VOUT | 0 | | | V | max equals VCC | 4 |
| Supply Voltage (VCC) | VCC | -0.5 | | 7 | V | | 4 |
| DC Input Voltage | VIN | -1.5 | | | V | upper limit VCC+1.5 V | 4 |
| DC Output Voltage | VOUT | -0.5 | | | V | upper limit VCC+0.5 V | 4 |
| Clamp Diode Current | IIK, IOK | -20 | | 20 | mA | | 4 |
| DC Output Current, per pin | IOUT | -35 | | 35 | mA | | 4 |
| DC VCC or GND Current, per pin | ICC | -70 | | 70 | mA | | 4 |
| Storage Temperature Range | TSTG | -65 | | 150 | °C | | 4 |
| Power Dissipation | PD | | | 600 | mW | plastic N package (Note 3) | 4 |
| Power Dissipation | PD | | | 500 | mW | S.O. package only | 4 |
| Lead Temperature | TL | | | 260 | °C | soldering 10 seconds | 4 |
| Minimum HIGH Level Input Voltage | VIH | 2 | | | V | guaranteed limit at TA -40 to 85 C | 4 |
| Maximum LOW Level Input Voltage | VIL | | | 0.8 | V | guaranteed limit at TA -40 to 85 C | 4 |
| Minimum HIGH Level Output Voltage | VOH | 3.84 | 4.2 | | V | /IOUT/ 6.0 mA, VCC 4.5V; VIN VIH or VIL | 4 |
| Minimum HIGH Level Output Voltage | VOH | 4.84 | 5.2 | | V | /IOUT/ 7.2 mA, VCC 5.5V; VIN VIH or VIL | 4 |
| Maximum LOW Level Output Voltage | VOL | | 0 | 0.1 | V | /IOUT/ 20 µA; VIN VIH or VIL | 4 |
| Maximum LOW Level Output Voltage | VOL | | 0.2 | 0.33 | V | /IOUT/ 6.0 mA, VCC 4.5V; VIN VIH or VIL | 4 |
| Maximum Input Current | IIN | -0.5 | 0.05 | 0.5 | µA | VIN VCC or GND; VIH or VIL | 4 |
| Maximum 3-STATE Output Leakage Current | IOZ | -2.5 | 0.25 | 2.5 | µA | VOUT VCC or GND; G VIH or G VIL | 4 |
| Maximum Quiescent Supply Current | ICC | | 4 | 40 | µA | VIN VCC or GND; IOUT 0 µA | 4 |
| Maximum Quiescent Supply Current (TTL inputs) | ICC | | 0.6 | 1.3 | mA | VIN 2.4V or 0.5V (Note 4) | 4 |
| Maximum Propagation Delay | tPHL, tPLH | | 14 | 25 | ns | CL 50 pF | 5 |
| Maximum Propagation Delay | tPHL, tPLH | | 20 | 35 | ns | CL 150 pF | 5 |
| Maximum Output Enable Time | tPZH, tPZL | | 21 | 38 | ns | RL 1 kΩ, CL 50 pF | 5 |
| Maximum Output Enable Time | tPZH, tPZL | | 26 | 53 | ns | RL 1 kΩ, CL 150 pF | 5 |
| Maximum Output Disable Time | tPHZ, tPLZ | | 16 | 32 | ns | RL 1 kΩ, CL 50 pF | 5 |
| Maximum Output Rise and Fall Time | tTHL, tTLH | | 6 | 15 | ns | CL 50 pF | 5 |
| Maximum Input Capacitance | CIN | | 10 | 15 | pF | | 5 |
| Maximum Output Capacitance | COUT | | 15 | 20 | pF | | 5 |
## CAD (KiCad official)
- Symbol: `MM74HCT240MTCX`
- Footprint: `Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm`
- 3D model: TSSOP-20 (KiCad packages3D, STEP)
- 3D model files: `mm74hct240mtcx-etched.step` / `mm74hct240mtcx-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `mm74hct240mtcx.step` / `mm74hct240mtcx.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [onsemi datasheet](https://www.onsemi.com/pdf/datasheet/mm74hct240mtcx-d.pdf) (10 pp, sha256 `997baff6099f2ae7`, retrieved 2026-10-27, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/mm74hct240mtcx-datasheet.pdf)