# MM74HCT08MX

**onsemi** · Gates · SOIC-14

MM74HCT08MX from onsemi, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | A1 | input | Gate 1 input A, TTL-compatible threshold (VIH min 2.0V, VIL max 0.8V). |
| 2 | B1 | input | Gate 1 input B, TTL-compatible threshold (VIH min 2.0V, VIL max 0.8V). |
| 3 | Y1 | output | Gate 1 AND output, drives 10 LS-TTL loads with |IOUT| up to 4.0mA at VCC = 4.5V. |
| 4 | A2 | input | Gate 2 input A, TTL-compatible threshold (VIH min 2.0V, VIL max 0.8V). |
| 5 | B2 | input | Gate 2 input B, TTL-compatible threshold (VIH min 2.0V, VIL max 0.8V). |
| 6 | Y2 | output | Gate 2 AND output, drives 10 LS-TTL loads with |IOUT| up to 4.0mA at VCC = 4.5V. |
| 7 | GND | power_in | Ground reference for the device; absolute maximum VCC or GND current is ±50mA per pin. |
| 8 | Y3 | output | Gate 3 AND output, drives 10 LS-TTL loads with |IOUT| up to 4.0mA at VCC = 4.5V. |
| 9 | A3 | input | Gate 3 input A, TTL-compatible threshold (VIH min 2.0V, VIL max 0.8V). |
| 10 | B3 | input | Gate 3 input B, TTL-compatible threshold (VIH min 2.0V, VIL max 0.8V). |
| 11 | Y4 | output | Gate 4 AND output, drives 10 LS-TTL loads with |IOUT| up to 4.0mA at VCC = 4.5V. |
| 12 | A4 | input | Gate 4 input A, TTL-compatible threshold (VIH min 2.0V, VIL max 0.8V). |
| 13 | B4 | input | Gate 4 input B, TTL-compatible threshold (VIH min 2.0V, VIL max 0.8V). |
| 14 | VCC | power_in | Positive supply voltage, recommended 4.5V to 5.5V with absolute maximum -0.5V to +7.0V. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | onsemi |
| Package | SOIC-14 |
| Category | Logic ICs |
| Pins | 14 |

## CAD (KiCad official)

- Symbol: `MM74HCT08MX`
- Footprint: `Package_SO:SOIC-14_3.9x8.7mm_P1.27mm`
- 3D model: SOIC-14 (KiCad packages3D, STEP)
- 3D model files: `mm74hct08mx-etched.step` / `mm74hct08mx-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `mm74hct08mx.step` / `mm74hct08mx.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [onsemi datasheet](https://www.onsemi.com/pdf/datasheet/mm74hct08mx-d.pdf) (9 pp, sha256 `ef2180b163d96e2e`, retrieved 2026-10-26, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/mm74hct08mx-datasheet.pdf)