# MM74HCT05MX

**onsemi** · Inverters · SOIC-14

MM74HCT05MX from onsemi, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | A1 | input | Gate 1 inverter input, TTL-compatible with VIH min 2.0V and VIL max 0.8V. |
| 2 | Y1 | output | Gate 1 open-drain inverter output that needs an external pull-up resistor, with VOL max 0.33V at 4.0mA and VCC=4.5V. |
| 3 | A2 | input | Gate 2 inverter input, TTL-compatible with VIH min 2.0V and VIL max 0.8V. |
| 4 | Y2 | output | Gate 2 open-drain inverter output that needs an external pull-up resistor, with VOL max 0.33V at 4.0mA and VCC=4.5V. |
| 5 | A3 | input | Gate 3 inverter input, TTL-compatible with VIH min 2.0V and VIL max 0.8V. |
| 6 | Y3 | output | Gate 3 open-drain inverter output that needs an external pull-up resistor, with VOL max 0.33V at 4.0mA and VCC=4.5V. |
| 7 | GND | power_in | Ground pin, 0V reference for the device. |
| 8 | Y4 | output | Gate 4 open-drain inverter output that needs an external pull-up resistor, with VOL max 0.33V at 4.0mA and VCC=4.5V. |
| 9 | A4 | input | Gate 4 inverter input, TTL-compatible with VIH min 2.0V and VIL max 0.8V. |
| 10 | Y5 | output | Gate 5 open-drain inverter output that needs an external pull-up resistor, with VOL max 0.33V at 4.0mA and VCC=4.5V. |
| 11 | A5 | input | Gate 5 inverter input, TTL-compatible with VIH min 2.0V and VIL max 0.8V. |
| 12 | Y6 | output | Gate 6 open-drain inverter output that needs an external pull-up resistor, with VOL max 0.33V at 4.0mA and VCC=4.5V. |
| 13 | A6 | input | Gate 6 inverter input, TTL-compatible with VIH min 2.0V and VIL max 0.8V. |
| 14 | VCC | power_in | Positive supply voltage, recommended 4.5V to 5.5V (absolute maximum -0.5V to +7.0V). |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | onsemi |
| Package | SOIC-14 |
| Category | Logic |
| Pins | 14 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| VCC Supply Voltage | VCC | -0.5 |  | 7 | V |  | 4 |
| DC Input Voltage | VIN | -1.5 |  |  | V | Max printed as VCC+1.5V | 4 |
| DC Output Voltage | VOUT | -0.5 |  |  | V | Max printed as VCC+0.5V | 4 |
| Clamp Diode Current | IIK, IOK | -20 |  | 20 | mA |  | 4 |
| DC Output Current, per pin | IOUT | -25 |  | 25 | mA |  | 4 |
| DC VCC or GND Current, per pin | ICC | -50 |  | 50 | mA |  | 4 |
| Storage Temperature Range | TSTG | -65 |  | 150 | °C |  | 4 |
| Power Dissipation | PD |  |  | 600 | mW | Note 2 | 4 |
| Power Dissipation (S.O. package only) | PD |  |  | 500 | mW | S.O. package only | 4 |
| Lead Temperature (Soldering 10 seconds) | TL |  |  | 260 | °C | Soldering 10 seconds | 4 |
| Supply Voltage | VCC | 4.5 |  | 5.5 | V |  | 4 |
| DC Input Voltage | VIN | 0 |  |  | V | Max printed as VCC | 4 |
| DC Output Voltage | VOUT | 0 |  | 5.5 | V |  | 4 |
| Operating Temperature Range | TA | -40 |  | 85 | °C |  | 4 |
| Input Rise or Fall Times | tr, tf |  |  | 500 | ns |  | 4 |
| Minimum HIGH Level Input Voltage | VIH | 2 |  |  | V | VCC = 5V ±10% | 5 |
| Maximum LOW Level Input Voltage | VIL |  |  | 0.8 | V | VCC = 5V ±10% | 5 |
| Maximum LOW Level Output Voltage | VOL |  | 0 | 0.1 | V | VIN = VIH, /IOUT/ = 20µA | 5 |
| Maximum LOW Level Output Voltage | VOL |  | 0.2 | 0.33 | V | VIN = VIH, /IOUT/ = 4.0mA, VCC = 4.5V | 5 |
| Maximum Input Current | IIN | -1 | 0.1 | 1 | µA | VIN = VCC or GND, VIH or VIL | 5 |
| Maximum HIGH Level Output Leakage Current | ILKG |  | 0.5 | 5 | µA | VIN = VIH or VIL, VOUT = VCC | 5 |
| Maximum Quiescent Supply Current | ICC |  | 2 | 20 | µA | VIN = VCC or GND, IOUT = 0µA | 5 |
| Maximum Quiescent Supply Current | ICC |  | 0.3 | 0.4 | mA | VIN = 2.4V or 0.5V (note 3) | 5 |
| Off State Current | IOHZ |  |  | 10 | µA | VCC = 4.5V-5.5V, VO = 5.5V | 5 |
| Maximum Propagation Delay (tPZL) | tPZL |  | 8 | 15 | ns | RL = 1kΩ; VCC = 5V, TA = 25°C, CL = 15pF, tr = tf = 6ns | 5 |
| Maximum Propagation Delay (tPLZ) | tPLZ |  | 9 | 16 | ns | RL = 1kΩ; VCC = 5V, TA = 25°C, CL = 15pF, tr = tf = 6ns | 5 |
| Maximum Propagation Delay (tPZL) | tPZL |  | 10 | 28 | ns | RL = 1kΩ; VCC = 5V ±10%, CL = 50pF, tr = tf = 6ns | 5 |
| Maximum Propagation Delay (tPLZ) | tPLZ |  | 12 | 25 | ns | RL = 1kΩ; VCC = 5V ±10%, CL = 50pF, tr = tf = 6ns | 5 |
| Maximum Output Fall Time | tTHL |  | 10 | 19 | ns |  | 5 |
| Maximum Input Capacitance | CIN |  | 5 | 10 | pF |  | 5 |

## CAD (KiCad official)

- Symbol: `MM74HCT05MX`
- Footprint: `Package_SO:SOIC-14_3.9x8.7mm_P1.27mm`
- 3D model: SOIC-14 (KiCad packages3D, STEP)
- 3D model files: `mm74hct05mx-etched.step` / `mm74hct05mx-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `mm74hct05mx.step` / `mm74hct05mx.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [onsemi datasheet](https://www.onsemi.com/pdf/datasheet/mm74hct05mx-d.pdf) (9 pp, sha256 `feeec8b73a147712`, retrieved 2026-10-17, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/mm74hct05mx-datasheet.pdf)