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MM74HC595MTCX

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onsemi Registers, TSSOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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MM74HC595MTCX

onsemi · Registers · TSSOP-16

MM74HC595MTCX from onsemi, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 QB tri_state Output bit B of the 8-bit storage register, a 3-state output that goes high-impedance when G is HIGH.
2 QC tri_state Output bit C of the 8-bit storage register, a 3-state output that goes high-impedance when G is HIGH.
3 QD tri_state Output bit D of the 8-bit storage register, a 3-state output that goes high-impedance when G is HIGH.
4 QE tri_state Output bit E of the 8-bit storage register, a 3-state output that goes high-impedance when G is HIGH.
5 QF tri_state Output bit F of the 8-bit storage register, a 3-state output that goes high-impedance when G is HIGH.
6 QG tri_state Output bit G of the 8-bit storage register, a 3-state output that goes high-impedance when G is HIGH.
7 QH tri_state Output bit H of the 8-bit storage register, a 3-state output that goes high-impedance when G is HIGH.
8 GND power_in Ground reference for the device; all voltages are referenced to ground.
9 Q'H output Serial data output from the shift register stage H, used for cascading devices; it is cleared to 0 when SCLR is LOW.
10 SCLR input Active-LOW direct clear of the shift register; setup and removal times to SCK are specified in the AC characteristics.
11 SCK input Shift register clock input, positive-edge triggered; maximum shift frequency is 30 MHz guaranteed.
12 RCK input Storage register clock input, positive-edge triggered, which transfers the shift register contents to the output latches.
13 G input Active-LOW output enable; when HIGH it forces QA through QH into the 3-state condition.
14 SER input Serial data input to the 8-bit shift register; input current is 1 µA maximum.
15 QA tri_state Output bit A of the 8-bit storage register, a 3-state output that goes high-impedance when G is HIGH.
16 VCC power_in Supply voltage, specified from 2 V to 6 V in the recommended operating conditions.

Key specifications

Parameter Value
Manufacturer onsemi
Package TSSOP-16
Category Logic ICs
Pins 16

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply Voltage (recommended) VCC 2 6 V 5
DC Input or Output Voltage (recommended) VIN, VOUT 0 V max = VCC 5
Operating Temperature Range TA -40 85 °C 5
Input Rise and Fall Times tR,tF 1000 ns VCC=2.0V 5
Input Rise and Fall Times tR,tF 500 ns VCC=4.5V 5
Input Rise and Fall Times tR,tF 400 ns VCC=6.0V 5
Supply Voltage (abs max) VCC -0.5 7 V 5
DC Input Voltage VIN -1.5 V -1.5 to VCC+1.5 5
DC Output Voltage VOUT -0.5 V -0.5 to VCC+0.5 5
Clamp Diode Current IIK, IOK -20 20 mA ±20 5
DC Output Current, per Pin IOUT -35 35 mA ±35 5
DC VCC or GND Current, per Pin ICC -70 70 mA ±70 5
Storage Temperature Range TSTG -65 150 °C 5
Lead Temperature TL 260 °C 5
ESD Capability HBM ESD 4000 V Human Body Model, JESD22-A114 5
Minimum HIGH Level Input Voltage VIH 1.5 V VCC=2.0V, TA=-40 to 85°C 6
Minimum HIGH Level Input Voltage VIH 3.15 V VCC=4.5V, TA=-40 to 85°C 6
Minimum HIGH Level Input Voltage VIH 4.2 V VCC=6.0V, TA=-40 to 85°C 6
Maximum LOW Level Input Voltage VIL 0.5 V VCC=2.0V, TA=-40 to 85°C 6
Maximum LOW Level Input Voltage VIL 1.35 V VCC=4.5V, TA=-40 to 85°C 6
Maximum LOW Level Input Voltage VIL 1.8 V VCC=6.0V, TA=-40 to 85°C 6
Minimum HIGH Level Output Voltage VOH 1.9 2 V VIN=VIH or VIL, /IOUT/≤20µA, VCC=2.0V, TA=-40 to 85°C 6
Minimum HIGH Level Output Voltage VOH 4.4 4.5 V VIN=VIH or VIL, /IOUT/≤20µA, VCC=4.5V, TA=-40 to 85°C 6
Minimum HIGH Level Output Voltage VOH 5.9 6 V VIN=VIH or VIL, /IOUT/≤20µA, VCC=6.0V, TA=-40 to 85°C 6
Minimum HIGH Level Output Voltage Q'H VOH 3.84 4.2 V VIN=VIH or VIL, /IOUT/≤4.0mA, VCC=4.5V, TA=-40 to 85°C 6
Minimum HIGH Level Output Voltage Q'H VOH 5.34 5.2 V VIN=VIH or VIL, /IOUT/≤5.2mA, VCC=6.0V, TA=-40 to 85°C 6
Minimum HIGH Level Output Voltage QA-QH VOH 3.84 4.2 V VIN=VIH or VIL, /IOUT/≤6.0mA, VCC=4.5V, TA=-40 to 85°C 6
Minimum HIGH Level Output Voltage QA-QH VOH 5.34 5.7 V VIN=VIH or VIL, /IOUT/≤7.8mA, VCC=6.0V, TA=-40 to 85°C 6
Maximum LOW Level Output Voltage VOL 0 0.1 V VIN=VIH or VIL, /IOUT/≤20µA, VCC=2.0V/4.5V/6.0V, TA=-40 to 85°C 6
Maximum LOW Level Output Voltage Q'H VOL 0.2 0.33 V VIN=VIH or VIL, /IOUT/≤4.0mA, VCC=4.5V, TA=-40 to 85°C 6
Maximum LOW Level Output Voltage QA-QH VOL 0.2 0.33 V VIN=VIH or VIL, /IOUT/≤6.0mA, VCC=4.5V, TA=-40 to 85°C 6
Maximum Input Leakage IIN -1 1 µA VIN=VCC or GND, VCC=6.0V, TA=-40 to 85°C 6
Maximum 3-State Output Leakage IOZ -5 5 µA VOUT=VCC or GND, G=VIH, VCC=6.0V, TA=-40 to 85°C 6
Maximum Quiescent Supply Current ICC 8 80 µA VIN=VCC or GND, IOUT=0, VCC=6.0V, TA=-40 to 85°C 6
Maximum Operating Frequency fMAX 4.8 10 MHz VCC=2.0V, CL=50pF, TA=-40 to 85°C 8
Maximum Operating Frequency fMAX 24 45 MHz VCC=4.5V, CL=50pF, TA=-40 to 85°C 8
Maximum Operating Frequency fMAX 28 50 MHz VCC=6.0V, CL=50pF, TA=-40 to 85°C 8
Propagation Delay SCK to Q'H tPHL,tPLH 14 53 ns VCC=4.5V, CL=50pF, TA=-40 to 85°C 8
Propagation Delay RCK to QA thru Q'H tPHL,tPLH 21 44 ns VCC=4.5V, CL=50pF, TA=-40 to 85°C 8
Output Enable Time G to QA thru Q'H tPZH,tPZL 15 44 ns RL=1kΩ, VCC=4.5V, CL=50pF, TA=-40 to 85°C 8
Output Disable Time G to QA thru Q'H tPHZ,tPLZ 15 44 ns RL=1kΩ, CL=50pF, VCC=4.5V, TA=-40 to 85°C 8
Minimum Setup Time SER to SCK tS 20 25 ns RL=1kΩ, CL=50pF, VCC=4.5V, TA=-40 to 85°C 9
Minimum Removal Time SCLR to SCK tR 10 13 ns VCC=4.5V, TA=-40 to 85°C 9
Minimum Hold Time SER to SCK tH 5 5 ns VCC=4.5V, TA=-40 to 85°C 9
Minimum Pulse Width SCK or SCLR tW 9 20 ns VCC=4.5V, TA=-40 to 85°C 9
Maximum Output Rise and Fall Time QA-QH tTHL,tTLH 7 15 ns VCC=4.5V, TA=-40 to 85°C 9
Maximum Input Capacitance CIN 5 10 pF TA=-40 to 85°C 9
Maximum Output Capacitance COUT 15 20 pF TA=-40 to 85°C 9
Power Dissipation Capacitance, Outputs Enabled CPD 150 pF G=GND 9

CAD (KiCad official)

  • Symbol: MM74HC595MTCX
  • Footprint: Package_SO:TSSOP-16_4.4x5mm_P0.65mm
  • 3D model: TSSOP-16 (KiCad packages3D, STEP)
  • 3D model files: mm74hc595mtcx-etched.step / mm74hc595mtcx-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); mm74hc595mtcx.step / mm74hc595mtcx.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: onsemi datasheet (16 pp, sha256 bf39513b7d1d6b0b, retrieved 2026-10-23, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF