component

MM74HC573MTC

Public Made by Adom

by adom

onsemi Latches, TSSOP-20. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentlogic icsmm74hc573mtcfactory-2.0.0extractor-text
Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity
main
mm74hc573mtc / README.md
History Download
Ray Publish 0.1.0 08c6554 10d ago

MM74HC573MTC

onsemi · Latches · TSSOP-20

MM74HC573MTC from onsemi, in a TSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OC input Output Control input; a HIGH level puts all outputs in the high-impedance state regardless of other inputs and stored data.
2 1D input Data input 1 of the octal D-type latch; Q follows D while Latch Enable is HIGH.
3 2D input Data input 2 of the octal D-type latch; Q follows D while Latch Enable is HIGH.
4 3D input Data input 3 of the octal D-type latch; Q follows D while Latch Enable is HIGH.
5 4D input Data input 4 of the octal D-type latch; Q follows D while Latch Enable is HIGH.
6 5D input Data input 5 of the octal D-type latch; Q follows D while Latch Enable is HIGH.
7 6D input Data input 6 of the octal D-type latch; Q follows D while Latch Enable is HIGH.
8 7D input Data input 7 of the octal D-type latch; Q follows D while Latch Enable is HIGH.
9 8D input Data input 8 of the octal D-type latch; Q follows D while Latch Enable is HIGH.
10 GND power_in Ground, 0 V reference for all voltages.
11 LE input Latch Enable input; HIGH makes Q outputs follow D, LOW latches and retains the data.
12 8Q tri_state 3-STATE latch output 8, driving up to 15 LS-TTL loads; high impedance when OC is HIGH.
13 7Q tri_state 3-STATE latch output 7, driving up to 15 LS-TTL loads; high impedance when OC is HIGH.
14 6Q tri_state 3-STATE latch output 6, driving up to 15 LS-TTL loads; high impedance when OC is HIGH.
15 5Q tri_state 3-STATE latch output 5, driving up to 15 LS-TTL loads; high impedance when OC is HIGH.
16 4Q tri_state 3-STATE latch output 4, driving up to 15 LS-TTL loads; high impedance when OC is HIGH.
17 3Q tri_state 3-STATE latch output 3, driving up to 15 LS-TTL loads; high impedance when OC is HIGH.
18 2Q tri_state 3-STATE latch output 2, driving up to 15 LS-TTL loads; high impedance when OC is HIGH.
19 1Q tri_state 3-STATE latch output 1, driving up to 15 LS-TTL loads; high impedance when OC is HIGH.
20 VCC power_in Supply voltage, recommended 2 to 6 V (absolute maximum 7.0 V).

Key specifications

Parameter Value
Manufacturer onsemi
Package TSSOP-20
Category Logic ICs
Pins 20

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply Voltage (VCC) VCC -0.5 7 V 3
DC Input Voltage VIN -1.5 V Max printed as VCC + 1.5 V 3
DC Output Voltage VOUT -0.5 V Max printed as VCC + 0.5 V 3
Clamp Diode Current IIK, IOK -20 20 mA 3
DC Output Current, per pin IOUT -35 35 mA 3
DC VCC or GND Current, per pin ICC -70 70 mA 3
Storage Temperature Range TSTG -65 150 °C 3
Power Dissipation PD 600 mW Note 3 (derate 12 mW/°C from 65°C to 85°C, plastic N package) 3
Power Dissipation (S.O. package only) PD 500 mW S.O. package only 3
Lead Temperature TL 260 °C Soldering 10 seconds 3
Supply Voltage (VCC) VCC 2 6 V 3
DC Input or Output Voltage VIN, VOUT 0 V Max printed as VCC 3
Operating Temperature Range TA -40 85 °C 3
Input Rise or Fall Time tr, tf 1000 ns VCC = 2.0 V 3
Input Rise or Fall Time tr, tf 500 ns VCC = 4.5 V 3
Input Rise or Fall Time tr, tf 400 ns VCC = 6.0 V 3
Minimum HIGH Level Input Voltage VIH 1.5 V VCC = 2.0 V, TA = -40 to 85 °C 3
Minimum HIGH Level Input Voltage VIH 3.15 V VCC = 4.5 V, TA = -40 to 85 °C 3
Minimum HIGH Level Input Voltage VIH 4.2 V VCC = 6.0 V, TA = -40 to 85 °C 3
Maximum LOW Level Input Voltage VIL 0.5 V VCC = 2.0 V, TA = -40 to 85 °C 3
Maximum LOW Level Input Voltage VIL 1.35 V VCC = 4.5 V, TA = -40 to 85 °C 3
Maximum LOW Level Input Voltage VIL 1.8 V VCC = 6.0 V, TA = -40 to 85 °C 3
Minimum HIGH Level Output Voltage VOH 1.9 2 V VIN = VIH or VIL, /IOUT/ ≤ 20 µA, VCC = 2.0 V, TA = -40 to 85 °C 3
Minimum HIGH Level Output Voltage VOH 4.4 4.5 V VIN = VIH or VIL, /IOUT/ ≤ 20 µA, VCC = 4.5 V, TA = -40 to 85 °C 3
Minimum HIGH Level Output Voltage VOH 5.9 6 V VIN = VIH or VIL, /IOUT/ ≤ 20 µA, VCC = 6.0 V, TA = -40 to 85 °C 3
Minimum HIGH Level Output Voltage VOH 3.84 4.2 V VIN = VIH or VIL, /IOUT/ ≤ 6.0 mA, VCC = 4.5 V, TA = -40 to 85 °C 3
Minimum HIGH Level Output Voltage VOH 5.34 5.7 V VIN = VIH or VIL, /IOUT/ ≤ 7.8 mA, VCC = 6.0 V, TA = -40 to 85 °C 3
Maximum LOW Level Output Voltage VOL 0 0.1 V VIN = VIH or VIL, /IOUT/ ≤ 20 µA, VCC = 2.0 V, TA = -40 to 85 °C 3
Maximum LOW Level Output Voltage VOL 0.2 0.33 V VIN = VIH or VIL, /IOUT/ ≤ 6.0 mA, VCC = 4.5 V, TA = -40 to 85 °C 3
Maximum Input Current IIN -1 1 µA VIN = VCC or GND, VCC = 6.0 V, TA = -40 to 85 °C 3
Maximum 3-STATE Output Leakage Current IOZ -5 5 µA VOUT = VCC or GND, OC = VIH, VCC = 6.0 V, TA = -40 to 85 °C 3
Maximum Quiescent Supply Current ICC 80 µA VIN = VCC or GND, IOUT = 0 µA, VCC = 6.0 V, TA = -40 to 85 °C 3
Quiescent Supply Current per Input Pin (OE) ΔICC 1 1.8 mA VCC = 5.5 V, VIN = 2.4 V or 0.4 V, per input pin, TA = -40 to 85 °C 3
Quiescent Supply Current per Input Pin (LE) ΔICC 0.6 1 mA VCC = 5.5 V, VIN = 2.4 V or 0.4 V, per input pin, TA = -40 to 85 °C 3
Quiescent Supply Current per Input Pin (DATA) ΔICC 0.4 0.6 mA VCC = 5.5 V, VIN = 2.4 V or 0.4 V, per input pin, TA = -40 to 85 °C 3
Maximum Propagation Delay, Data to Q tPHL, tPLH 16 20 ns VCC = 5 V, TA = 25 °C, tr = tf = 6 ns, CL = 45 pF 4
Maximum Propagation Delay, LE to Q tPHL, tPLH 14 22 ns VCC = 5 V, TA = 25 °C, tr = tf = 6 ns, CL = 45 pF 4
Maximum Output Enable Time tPZH, tPZL 15 27 ns VCC = 5 V, TA = 25 °C, tr = tf = 6 ns, RL = 1 kΩ, CL = 45 pF 4
Maximum Output Disable Time tPHZ, tPLZ 13 23 ns VCC = 5 V, TA = 25 °C, tr = tf = 6 ns, RL = 1 kΩ, CL = 5 pF 4
Minimum Set Up Time, Data to LE tS 15 10 ns VCC = 5 V, TA = 25 °C, tr = tf = 6 ns 4
Minimum Hold Time, LE to Data tH 5 2 ns VCC = 5 V, TA = 25 °C, tr = tf = 6 ns 4
Minimum Pulse Width, LE or Data tW 16 10 ns VCC = 5 V, TA = 25 °C, tr = tf = 6 ns 4
Maximum Propagation Delay, Data to Q tPHL, tPLH 17 28 ns VCC = 4.5 V, CL = 50 pF, TA = -40 to 85 °C 4
Maximum Propagation Delay, LE to Q tPHL, tPLH 14 29 ns VCC = 4.5 V, CL = 50 pF, TA = -40 to 85 °C 4
Maximum Output Enable Time tPZH, tPZL 15 35 ns VCC = 4.5 V, RL = 1 kΩ, CL = 50 pF, TA = -40 to 85 °C 4
Maximum Output Disable Time tPHZ, tPLZ 13 31 ns VCC = 4.5 V, RL = 1 kΩ, CL = 50 pF, TA = -40 to 85 °C 4
Minimum Set Up Time, Data to LE tS 19 10 ns VCC = 4.5 V, TA = -40 to 85 °C 4
Minimum Hold Time, LE to Data tH 6 5 ns VCC = 4.5 V, TA = -40 to 85 °C 4
Minimum Pulse Width, LE or Data tW 20 9 ns VCC = 4.5 V, TA = -40 to 85 °C 4
Maximum Output Rise and Fall Time, Clock tTLH, tTHL 7 15 ns VCC = 4.5 V, CL = 50 pF, TA = -40 to 85 °C 4
Maximum Input Capacitance CIN 5 10 pF TA = -40 to 85 °C 4
Maximum Output Capacitance COUT 15 20 pF TA = -40 to 85 °C 5

CAD (KiCad official)

  • Symbol: MM74HC573MTC
  • Footprint: Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm
  • 3D model: TSSOP-20 (KiCad packages3D, STEP)
  • 3D model files: mm74hc573mtc-etched.step / mm74hc573mtc-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); mm74hc573mtc.step / mm74hc573mtc.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: onsemi datasheet (10 pp, sha256 dc033c439dc40dc5, retrieved 2026-10-20, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF