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MM74HC273WMX

Public Made by Adom

by adom

onsemi Flip Flops, SOIC-20-300mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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MM74HC273WMX

onsemi · Flip Flops · SOIC-20-300mil

MM74HC273WMX from onsemi, in a SOIC-20-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 CLEAR input Common asynchronous clear input; when LOW it sets all eight Q outputs to a low state.
2 1Q output Flip-flop 1 Q output, able to drive 10 LS-TTL loads.
3 1D input Flip-flop 1 data input, transferred to 1Q on the LOW-to-HIGH transition of CLOCK.
4 2D input Flip-flop 2 data input, transferred to 2Q on the LOW-to-HIGH transition of CLOCK.
5 2Q output Flip-flop 2 Q output, able to drive 10 LS-TTL loads.
6 3Q output Flip-flop 3 Q output, able to drive 10 LS-TTL loads.
7 3D input Flip-flop 3 data input, transferred to 3Q on the LOW-to-HIGH transition of CLOCK.
8 4D input Flip-flop 4 data input, transferred to 4Q on the LOW-to-HIGH transition of CLOCK.
9 4Q output Flip-flop 4 Q output, able to drive 10 LS-TTL loads.
10 GND power_in Ground, 0 V reference for all voltages.
11 CLOCK input Common clock input; data is transferred to the Q outputs on its LOW-to-HIGH transition.
12 5Q output Flip-flop 5 Q output, able to drive 10 LS-TTL loads.
13 5D input Flip-flop 5 data input, transferred to 5Q on the LOW-to-HIGH transition of CLOCK.
14 6D input Flip-flop 6 data input, transferred to 6Q on the LOW-to-HIGH transition of CLOCK.
15 6Q output Flip-flop 6 Q output, able to drive 10 LS-TTL loads.
16 7Q output Flip-flop 7 Q output, able to drive 10 LS-TTL loads.
17 7D input Flip-flop 7 data input, transferred to 7Q on the LOW-to-HIGH transition of CLOCK.
18 8D input Flip-flop 8 data input, transferred to 8Q on the LOW-to-HIGH transition of CLOCK.
19 8Q output Flip-flop 8 Q output, able to drive 10 LS-TTL loads.
20 VCC power_in Positive supply voltage, recommended 2 V to 6 V (absolute maximum 7.0 V).

Key specifications

Parameter Value
Manufacturer onsemi
Package SOIC-20-300mil
Category Logic ICs
Pins 20

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Minimum HIGH Level Input Voltage VIH 1.5 V VCC 2.0V; guaranteed limit TA -40 to 85°C 4
Minimum HIGH Level Input Voltage VIH 3.15 V VCC 4.5V; guaranteed limit TA -40 to 85°C 4
Minimum HIGH Level Input Voltage VIH 4.2 V VCC 6.0V; guaranteed limit TA -40 to 85°C 4
Maximum LOW Level Input Voltage VIL 0.5 V VCC 2.0V; guaranteed limit TA -40 to 85°C 4
Maximum LOW Level Input Voltage VIL 1.35 V VCC 4.5V; guaranteed limit TA -40 to 85°C 4
Maximum LOW Level Input Voltage VIL 1.8 V VCC 6.0V; guaranteed limit TA -40 to 85°C 4
Minimum HIGH Level Output Voltage VOH 1.9 2 V VIN VIH or VIL; /IOUT/ ≤ 20 µA; VCC 2.0V 4
Minimum HIGH Level Output Voltage VOH 4.4 4.5 V VIN VIH or VIL; /IOUT/ ≤ 20 µA; VCC 4.5V 4
Minimum HIGH Level Output Voltage VOH 5.9 6 V VIN VIH or VIL; /IOUT/ ≤ 20 µA; VCC 6.0V 4
Minimum HIGH Level Output Voltage VOH 3.84 4.2 V VIN VIH or VIL; /IOUT/ ≤ 4.0 mA; VCC 4.5V 4
Minimum HIGH Level Output Voltage VOH 5.34 5.7 V VIN VIH or VIL; /IOUT/ ≤ 5.2 mA; VCC 6.0V 4
Maximum LOW Level Output Voltage VOL 0 0.1 V VIN VIH or VIL; /IOUT/ ≤ 20 µA; VCC 2.0V 4
Maximum LOW Level Output Voltage VOL 0.2 0.33 V VIN VIH or VIL; /IOUT/ ≤ 4 mA; VCC 4.5V 4
Maximum Input Current IIN -1 0.1 1 µA VIN VCC or GND; VCC 6.0V; printed as ±; typ printed ±0.1 4
Maximum Quiescent Supply Current ICC 8 80 µA VIN VCC or GND; IOUT 0 µA; VCC 6.0V 4
Maximum Operating Frequency fMAX 4 16 MHz CL 50 pF; tr=tf 6 ns; VCC 2.0V; TA -40 to 85°C 5
Maximum Operating Frequency fMAX 21 74 MHz CL 50 pF; tr=tf 6 ns; VCC 4.5V; TA -40 to 85°C 5
Maximum Operating Frequency fMAX 24 78 MHz CL 50 pF; tr=tf 6 ns; VCC 6.0V; TA -40 to 85°C 5
Maximum Propagation Delay, Clock to Output tPHL, tPLH 38 170 ns CL 50 pF; tr=tf 6 ns; VCC 2.0V; TA -40 to 85°C 5
Maximum Propagation Delay, Clock to Output tPHL, tPLH 14 34 ns CL 50 pF; tr=tf 6 ns; VCC 4.5V; TA -40 to 85°C 5
Maximum Propagation Delay, Clock to Output tPHL, tPLH 12 29 ns CL 50 pF; tr=tf 6 ns; VCC 6.0V; TA -40 to 85°C 5
Maximum Propagation Delay, Clear to Output tPHL 42 170 ns CL 50 pF; tr=tf 6 ns; VCC 2.0V; TA -40 to 85°C 5
Maximum Propagation Delay, Clear to Output tPHL 19 34 ns CL 50 pF; tr=tf 6 ns; VCC 4.5V; TA -40 to 85°C 5
Maximum Propagation Delay, Clear to Output tPHL 18 29 ns CL 50 pF; tr=tf 6 ns; VCC 6.0V; TA -40 to 85°C 5
Minimum Removal Time, Clear to Clock tREM 0 32 ns CL 50 pF; tr=tf 6 ns; VCC 2.0V; TA -40 to 85°C 5
Minimum Removal Time, Clear to Clock tREM 0 6 ns CL 50 pF; tr=tf 6 ns; VCC 4.5V; TA -40 to 85°C 5
Minimum Removal Time, Clear to Clock tREM 0 5 ns CL 50 pF; tr=tf 6 ns; VCC 6.0V; TA -40 to 85°C 5
Minimum Setup Time, Data to Clock ts 26 125 ns CL 50 pF; tr=tf 6 ns; VCC 2.0V; TA -40 to 85°C 5
Minimum Setup Time, Data to Clock ts 7 25 ns CL 50 pF; tr=tf 6 ns; VCC 4.5V; TA -40 to 85°C 5
Minimum Setup Time, Data to Clock ts 5 21 ns CL 50 pF; tr=tf 6 ns; VCC 6.0V; TA -40 to 85°C 5
Minimum Hold Time, Clock to Data tH 15 0 ns CL 50 pF; tr=tf 6 ns; VCC 2.0V; TA -40 to 85°C 5
Minimum Hold Time, Clock to Data tH 6 0 ns CL 50 pF; tr=tf 6 ns; VCC 4.5V; TA -40 to 85°C 5
Minimum Hold Time, Clock to Data tH 4 0 ns CL 50 pF; tr=tf 6 ns; VCC 6.0V; TA -40 to 85°C 5
Minimum Pulse Width, Clock or Clear tW 34 100 ns CL 50 pF; tr=tf 6 ns; VCC 2.0V; TA -40 to 85°C 5
Minimum Pulse Width, Clock or Clear tW 11 20 ns CL 50 pF; tr=tf 6 ns; VCC 4.5V; TA -40 to 85°C 5
Minimum Pulse Width, Clock or Clear tW 10 18 ns CL 50 pF; tr=tf 6 ns; VCC 6.0V; TA -40 to 85°C 5
Maximum Output Rise and Fall Time tTHL, tTLH 28 95 ns CL 50 pF; tr=tf 6 ns; VCC 2.0V; TA -40 to 85°C 5
Maximum Output Rise and Fall Time tTHL, tTLH 11 19 ns CL 50 pF; tr=tf 6 ns; VCC 4.5V; TA -40 to 85°C 5
Maximum Output Rise and Fall Time tTHL, tTLH 9 16 ns CL 50 pF; tr=tf 6 ns; VCC 6.0V; TA -40 to 85°C 5
Maximum Input Capacitance CIN 7 10 pF 5
Supply Voltage VCC 2 6 V 4
DC Input or Output Voltage VIN, VOUT 0 V Upper limit printed as VCC 4
Operating Temperature Range TA -40 85 °C 4
Input Rise or Fall Time tr, tf 1000 ns VCC 2.0V 4
Input Rise or Fall Time tr, tf 500 ns VCC 4.5V 4
Input Rise or Fall Time tr, tf 400 ns VCC 6.0V 4
Supply Voltage VCC -0.5 7 V Minus sign not visible in extracted text 4
DC Input Voltage VIN -1.5 V Upper limit printed as VCC + 1.5 V (not numeric) 4
DC Output Voltage VOUT -0.5 V Upper limit printed as VCC + 0.5 V (not numeric) 4
Clamp Diode Current IIK, IOK -20 20 mA Printed as ±20 mA 4
DC Output Current, per pin IOUT -25 25 mA Printed as ±25 mA 4
DC VCC or GND Current, per pin ICC -50 50 mA Printed as ±50 mA 4
Storage Temperature Range TSTG -65 150 °C 4
Power Dissipation PD 500 mW S.O. package only 4
Lead Temperature TL 260 °C Soldering 10 seconds 4

CAD (KiCad official)

  • Symbol: MM74HC273WMX
  • Footprint: Package_SO:SOIC-20W_7.5x12.8mm_P1.27mm
  • 3D model: SOIC-20-300mil (KiCad packages3D, STEP)
  • 3D model files: mm74hc273wmx-etched.step / mm74hc273wmx-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); mm74hc273wmx.step / mm74hc273wmx.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: onsemi datasheet (10 pp, sha256 5c28536ae600965b, retrieved 2026-10-30, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF