component
MM74HC164M
Public Made by Adomby adom
onsemi Shift Registers, SOIC-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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MM74HC164M
onsemi · Shift Registers · SOIC-14
MM74HC164M from onsemi, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | A | input | Serial data input A, gated with B: a LOW at either A or B inhibits new data entry and resets the first flip-flop at the next clock pulse. |
| 2 | B | input | Serial data input B, gated with A: a HIGH on one input enables the other to determine the state of the first flip-flop. |
| 3 | QA | output | Parallel output A, the first register stage. |
| 4 | QB | output | Parallel output B of the shift register. |
| 5 | QC | output | Parallel output C of the shift register. |
| 6 | QD | output | Parallel output D of the shift register. |
| 7 | GND | power_in | Ground, 0 V reference. |
| 8 | CLOCK | input | Clock input; data shifts on the positive-going (LOW-to-HIGH) transition. |
| 9 | CLEAR | input | Active-low asynchronous clear, independent of the clock; a LOW level resets all outputs LOW. |
| 10 | QE | output | Parallel output E of the shift register. |
| 11 | QF | output | Parallel output F of the shift register. |
| 12 | QG | output | Parallel output G of the shift register. |
| 13 | QH | output | Parallel output H, the last register stage. |
| 14 | VCC | power_in | Positive supply voltage, 2 V to 6 V recommended operating range. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | onsemi |
| Package | SOIC-14 |
| Category | Logic |
| Pins | 14 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply Voltage | VCC | -0.5 | 7 | V | 4 | ||
| DC Input Voltage | VIN | -1.5 | V | 4 | |||
| DC Output Voltage | VOUT | -0.5 | V | 4 | |||
| Clamp Diode Current | IIK, IOK | -20 | 20 | mA | 4 | ||
| DC Output Current, per pin | IOUT | -25 | 25 | mA | 4 | ||
| DC VCC or GND Current, per pin | ICC | -50 | 50 | mA | 4 | ||
| Storage Temperature Range | TSTG | -65 | 150 | °C | 4 | ||
| Power Dissipation (S.O. package) | PD | 500 | mW | S.O. package only | 4 | ||
| Lead Temperature (soldering) | TL | 260 | °C | 10 seconds | 4 | ||
| Supply Voltage (recommended) | VCC | 2 | 6 | V | 4 | ||
| DC Input or Output Voltage (recommended) | VIN, VOUT | 0 | V | 4 | |||
| Operating Temperature Range | TA | -40 | 85 | °C | 4 | ||
| Input Rise or Fall Time | tr, tf | 1000 | ns | VCC = 2.0V | 4 | ||
| Input Rise or Fall Time | tr, tf | 500 | ns | VCC = 4.5V | 4 | ||
| Input Rise or Fall Time | tr, tf | 400 | ns | VCC = 6.0V | 4 | ||
| Minimum HIGH Level Input Voltage (VCC=2.0V) | VIH | 1.5 | V | 5 | |||
| Minimum HIGH Level Input Voltage (VCC=4.5V) | VIH | 3.15 | V | 5 | |||
| Minimum HIGH Level Input Voltage (VCC=6.0V) | VIH | 4.2 | V | 5 | |||
| Maximum LOW Level Input Voltage (VCC=2.0V) | VIL | 0.5 | V | 5 | |||
| Maximum LOW Level Input Voltage (VCC=4.5V) | VIL | 1.35 | V | 5 | |||
| Maximum LOW Level Input Voltage (VCC=6.0V) | VIL | 1.8 | V | 5 | |||
| Minimum HIGH Level Output Voltage (VCC=2.0V) | VOH | 1.9 | V | VIN = VIH or VIL, /IOUT/ ≤ 20µA | 5 | ||
| Minimum HIGH Level Output Voltage (VCC=4.5V) | VOH | 4.4 | 4.5 | V | VIN = VIH or VIL, /IOUT/ ≤ 20µA | 5 | |
| Minimum HIGH Level Output Voltage (VCC=6.0V) | VOH | 5.9 | 6 | V | VIN = VIH or VIL, /IOUT/ ≤ 20µA | 5 | |
| Minimum HIGH Level Output Voltage (VCC=4.5V) | VOH | 3.84 | 4.2 | V | VIN = VIH or VIL, /IOUT/ ≤ 4.0mA | 5 | |
| Minimum HIGH Level Output Voltage (VCC=6.0V) | VOH | 5.34 | 5.7 | V | VIN = VIH or VIL, /IOUT/ ≤ 5.2mA | 5 | |
| Maximum LOW Level Output Voltage (VCC=2.0V) | VOL | 0 | 0.1 | V | VIN = VIH or VIL, /IOUT/ ≤ 20µA | 5 | |
| Maximum LOW Level Output Voltage (VCC=4.5V) | VOL | 0 | 0.1 | V | VIN = VIH or VIL, /IOUT/ ≤ 20µA | 5 | |
| Maximum LOW Level Output Voltage (VCC=6.0V) | VOL | 0 | 0.1 | V | VIN = VIH or VIL, /IOUT/ ≤ 20µA | 5 | |
| Maximum LOW Level Output Voltage (VCC=4.5V) | VOL | 0.2 | 0.33 | V | VIN = VIH or VIL, /IOUT/ ≤ 4.0mA | 5 | |
| Maximum LOW Level Output Voltage (VCC=6.0V) | VOL | 0.2 | 0.33 | V | VIN = VIH or VIL, /IOUT/ ≤ 5.2mA | 5 | |
| Maximum Input Current (VCC=6.0V) | IIN | -1 | 1 | µA | VIN = VCC or GND | 5 | |
| Maximum Quiescent Supply Current (VCC=6.0V) | ICC | 80 | µA | VIN = VCC or GND, IOUT = 0µA | 5 | ||
| Maximum Propagation Delay, Clock to Output (5V) | tPHL, tPLH | 19 | 30 | ns | VCC = 5V, TA = 25°C, CL = 15pF, tr = tf = 6ns | 5 | |
| Maximum Propagation Delay, Clear to Output (5V) | tPHL | 23 | 35 | ns | VCC = 5V, TA = 25°C, CL = 15pF, tr = tf = 6ns | 5 | |
| Minimum Removal Time, Clear to Clock (5V) | tREM | 0 | -2 | ns | VCC = 5V, TA = 25°C, CL = 15pF, tr = tf = 6ns | 5 | |
| Minimum Setup Time, Data to Clock (5V) | tS | 20 | 12 | ns | VCC = 5V, TA = 25°C, CL = 15pF, tr = tf = 6ns | 5 | |
| Minimum Hold Time, Clock to Data (5V) | tH | 5 | 1 | ns | VCC = 5V, TA = 25°C, CL = 15pF, tr = tf = 6ns | 5 | |
| Minimum Pulse Width, Clear or Clock (5V) | tW | 16 | 10 | ns | VCC = 5V, TA = 25°C, CL = 15pF, tr = tf = 6ns | 5 | |
| Maximum Operating Frequency (VCC=2.0V) | fMAX | 4 | MHz | VCC = 2.0V; CL = 50pF, tr = tf = 6ns; TA = -40°C to 85°C | 6 | ||
| Maximum Operating Frequency (VCC=4.5V) | fMAX | 21 | MHz | VCC = 4.5V; CL = 50pF, tr = tf = 6ns; TA = -40°C to 85°C | 6 | ||
| Maximum Operating Frequency (VCC=6.0V) | fMAX | 24 | MHz | VCC = 6.0V; CL = 50pF, tr = tf = 6ns; TA = -40°C to 85°C | 6 | ||
| Maximum Propagation Delay, Clock to Output (VCC=2.0V) | tPHL, tPLH | 115 | 218 | ns | VCC = 2.0V; CL = 50pF, tr = tf = 6ns; TA = -40°C to 85°C | 6 | |
| Maximum Propagation Delay, Clock to Output (VCC=4.5V) | tPHL, tPLH | 13 | 44 | ns | VCC = 4.5V; CL = 50pF, tr = tf = 6ns; TA = -40°C to 85°C | 6 | |
| Maximum Propagation Delay, Clock to Output (VCC=6.0V) | tPHL, tPLH | 20 | 38 | ns | VCC = 6.0V; CL = 50pF, tr = tf = 6ns; TA = -40°C to 85°C | 6 | |
| Maximum Propagation Delay, Clear to Output (VCC=2.0V) | tPHL | 140 | 256 | ns | VCC = 2.0V; CL = 50pF, tr = tf = 6ns; TA = -40°C to 85°C | 6 | |
| Maximum Propagation Delay, Clear to Output (VCC=4.5V) | tPHL | 28 | 51 | ns | VCC = 4.5V; CL = 50pF, tr = tf = 6ns; TA = -40°C to 85°C | 6 | |
| Maximum Propagation Delay, Clear to Output (VCC=6.0V) | tPHL | 24 | 44 | ns | VCC = 6.0V; CL = 50pF, tr = tf = 6ns; TA = -40°C to 85°C | 6 | |
| Minimum Removal Time, Clear to Clock (VCC=2.0V) | tREM | 0 | -7 | ns | VCC = 2.0V; CL = 50pF, tr = tf = 6ns; TA = -40°C to 85°C | 6 | |
| Minimum Removal Time, Clear to Clock (VCC=4.5V) | tREM | 0 | -3 | ns | VCC = 4.5V; CL = 50pF, tr = tf = 6ns; TA = -40°C to 85°C | 6 | |
| Minimum Removal Time, Clear to Clock (VCC=6.0V) | tREM | 0 | -2 | ns | VCC = 6.0V; CL = 50pF, tr = tf = 6ns; TA = -40°C to 85°C | 6 | |
| Minimum Setup Time, Data to Clock (VCC=2.0V) | tS | 125 | 25 | ns | VCC = 2.0V; CL = 50pF, tr = tf = 6ns; TA = -40°C to 85°C | 6 | |
| Minimum Setup Time, Data to Clock (VCC=4.5V) | tS | 25 | 14 | ns | VCC = 4.5V; CL = 50pF, tr = tf = 6ns; TA = -40°C to 85°C | 6 | |
| Minimum Setup Time, Data to Clock (VCC=6.0V) | tS | 21 | 12 | ns | VCC = 6.0V; CL = 50pF, tr = tf = 6ns; TA = -40°C to 85°C | 6 | |
| Minimum Hold Time, Clock to Data (VCC=2.0V) | tH | 5 | -2 | ns | VCC = 2.0V; CL = 50pF, tr = tf = 6ns; TA = -40°C to 85°C | 6 | |
| Minimum Hold Time, Clock to Data (VCC=4.5V) | tH | 5 | 0 | ns | VCC = 4.5V; CL = 50pF, tr = tf = 6ns; TA = -40°C to 85°C | 6 | |
| Minimum Hold Time, Clock to Data (VCC=6.0V) | tH | 5 | 1 | ns | VCC = 6.0V; CL = 50pF, tr = tf = 6ns; TA = -40°C to 85°C | 6 | |
| Minimum Pulse Width, Clear or Clock (VCC=2.0V) | tW | 100 | 22 | ns | VCC = 2.0V; CL = 50pF, tr = tf = 6ns; TA = -40°C to 85°C | 6 | |
| Minimum Pulse Width, Clear or Clock (VCC=4.5V) | tW | 20 | 11 | ns | VCC = 4.5V; CL = 50pF, tr = tf = 6ns; TA = -40°C to 85°C | 6 | |
| Minimum Pulse Width, Clear or Clock (VCC=6.0V) | tW | 18 | 10 | ns | VCC = 6.0V; CL = 50pF, tr = tf = 6ns; TA = -40°C to 85°C | 6 |
CAD (KiCad official)
- Symbol:
MM74HC164M - Footprint:
Package_SO:SOIC-14_3.9x8.7mm_P1.27mm - 3D model: SOIC-14 (KiCad packages3D, STEP)
- 3D model files:
mm74hc164m-etched.step/mm74hc164m-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);mm74hc164m.step/mm74hc164m.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: onsemi datasheet (9 pp, sha256
92a64a24886add33, retrieved 2026-10-22, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# MM74HC164M
**onsemi** · Shift Registers · SOIC-14
MM74HC164M from onsemi, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | A | input | Serial data input A, gated with B: a LOW at either A or B inhibits new data entry and resets the first flip-flop at the next clock pulse. |
| 2 | B | input | Serial data input B, gated with A: a HIGH on one input enables the other to determine the state of the first flip-flop. |
| 3 | QA | output | Parallel output A, the first register stage. |
| 4 | QB | output | Parallel output B of the shift register. |
| 5 | QC | output | Parallel output C of the shift register. |
| 6 | QD | output | Parallel output D of the shift register. |
| 7 | GND | power_in | Ground, 0 V reference. |
| 8 | CLOCK | input | Clock input; data shifts on the positive-going (LOW-to-HIGH) transition. |
| 9 | CLEAR | input | Active-low asynchronous clear, independent of the clock; a LOW level resets all outputs LOW. |
| 10 | QE | output | Parallel output E of the shift register. |
| 11 | QF | output | Parallel output F of the shift register. |
| 12 | QG | output | Parallel output G of the shift register. |
| 13 | QH | output | Parallel output H, the last register stage. |
| 14 | VCC | power_in | Positive supply voltage, 2 V to 6 V recommended operating range. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | onsemi |
| Package | SOIC-14 |
| Category | Logic |
| Pins | 14 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply Voltage | VCC | -0.5 | | 7 | V | | 4 |
| DC Input Voltage | VIN | -1.5 | | | V | | 4 |
| DC Output Voltage | VOUT | -0.5 | | | V | | 4 |
| Clamp Diode Current | IIK, IOK | -20 | | 20 | mA | | 4 |
| DC Output Current, per pin | IOUT | -25 | | 25 | mA | | 4 |
| DC VCC or GND Current, per pin | ICC | -50 | | 50 | mA | | 4 |
| Storage Temperature Range | TSTG | -65 | | 150 | °C | | 4 |
| Power Dissipation (S.O. package) | PD | | | 500 | mW | S.O. package only | 4 |
| Lead Temperature (soldering) | TL | | | 260 | °C | 10 seconds | 4 |
| Supply Voltage (recommended) | VCC | 2 | | 6 | V | | 4 |
| DC Input or Output Voltage (recommended) | VIN, VOUT | 0 | | | V | | 4 |
| Operating Temperature Range | TA | -40 | | 85 | °C | | 4 |
| Input Rise or Fall Time | tr, tf | | | 1000 | ns | VCC = 2.0V | 4 |
| Input Rise or Fall Time | tr, tf | | | 500 | ns | VCC = 4.5V | 4 |
| Input Rise or Fall Time | tr, tf | | | 400 | ns | VCC = 6.0V | 4 |
| Minimum HIGH Level Input Voltage (VCC=2.0V) | VIH | 1.5 | | | V | | 5 |
| Minimum HIGH Level Input Voltage (VCC=4.5V) | VIH | 3.15 | | | V | | 5 |
| Minimum HIGH Level Input Voltage (VCC=6.0V) | VIH | 4.2 | | | V | | 5 |
| Maximum LOW Level Input Voltage (VCC=2.0V) | VIL | | | 0.5 | V | | 5 |
| Maximum LOW Level Input Voltage (VCC=4.5V) | VIL | | | 1.35 | V | | 5 |
| Maximum LOW Level Input Voltage (VCC=6.0V) | VIL | | | 1.8 | V | | 5 |
| Minimum HIGH Level Output Voltage (VCC=2.0V) | VOH | 1.9 | | | V | VIN = VIH or VIL, /IOUT/ ≤ 20µA | 5 |
| Minimum HIGH Level Output Voltage (VCC=4.5V) | VOH | 4.4 | 4.5 | | V | VIN = VIH or VIL, /IOUT/ ≤ 20µA | 5 |
| Minimum HIGH Level Output Voltage (VCC=6.0V) | VOH | 5.9 | 6 | | V | VIN = VIH or VIL, /IOUT/ ≤ 20µA | 5 |
| Minimum HIGH Level Output Voltage (VCC=4.5V) | VOH | 3.84 | 4.2 | | V | VIN = VIH or VIL, /IOUT/ ≤ 4.0mA | 5 |
| Minimum HIGH Level Output Voltage (VCC=6.0V) | VOH | 5.34 | 5.7 | | V | VIN = VIH or VIL, /IOUT/ ≤ 5.2mA | 5 |
| Maximum LOW Level Output Voltage (VCC=2.0V) | VOL | | 0 | 0.1 | V | VIN = VIH or VIL, /IOUT/ ≤ 20µA | 5 |
| Maximum LOW Level Output Voltage (VCC=4.5V) | VOL | | 0 | 0.1 | V | VIN = VIH or VIL, /IOUT/ ≤ 20µA | 5 |
| Maximum LOW Level Output Voltage (VCC=6.0V) | VOL | | 0 | 0.1 | V | VIN = VIH or VIL, /IOUT/ ≤ 20µA | 5 |
| Maximum LOW Level Output Voltage (VCC=4.5V) | VOL | | 0.2 | 0.33 | V | VIN = VIH or VIL, /IOUT/ ≤ 4.0mA | 5 |
| Maximum LOW Level Output Voltage (VCC=6.0V) | VOL | | 0.2 | 0.33 | V | VIN = VIH or VIL, /IOUT/ ≤ 5.2mA | 5 |
| Maximum Input Current (VCC=6.0V) | IIN | -1 | | 1 | µA | VIN = VCC or GND | 5 |
| Maximum Quiescent Supply Current (VCC=6.0V) | ICC | | | 80 | µA | VIN = VCC or GND, IOUT = 0µA | 5 |
| Maximum Propagation Delay, Clock to Output (5V) | tPHL, tPLH | | 19 | 30 | ns | VCC = 5V, TA = 25°C, CL = 15pF, tr = tf = 6ns | 5 |
| Maximum Propagation Delay, Clear to Output (5V) | tPHL | | 23 | 35 | ns | VCC = 5V, TA = 25°C, CL = 15pF, tr = tf = 6ns | 5 |
| Minimum Removal Time, Clear to Clock (5V) | tREM | 0 | -2 | | ns | VCC = 5V, TA = 25°C, CL = 15pF, tr = tf = 6ns | 5 |
| Minimum Setup Time, Data to Clock (5V) | tS | 20 | 12 | | ns | VCC = 5V, TA = 25°C, CL = 15pF, tr = tf = 6ns | 5 |
| Minimum Hold Time, Clock to Data (5V) | tH | 5 | 1 | | ns | VCC = 5V, TA = 25°C, CL = 15pF, tr = tf = 6ns | 5 |
| Minimum Pulse Width, Clear or Clock (5V) | tW | 16 | 10 | | ns | VCC = 5V, TA = 25°C, CL = 15pF, tr = tf = 6ns | 5 |
| Maximum Operating Frequency (VCC=2.0V) | fMAX | 4 | | | MHz | VCC = 2.0V; CL = 50pF, tr = tf = 6ns; TA = -40°C to 85°C | 6 |
| Maximum Operating Frequency (VCC=4.5V) | fMAX | 21 | | | MHz | VCC = 4.5V; CL = 50pF, tr = tf = 6ns; TA = -40°C to 85°C | 6 |
| Maximum Operating Frequency (VCC=6.0V) | fMAX | 24 | | | MHz | VCC = 6.0V; CL = 50pF, tr = tf = 6ns; TA = -40°C to 85°C | 6 |
| Maximum Propagation Delay, Clock to Output (VCC=2.0V) | tPHL, tPLH | | 115 | 218 | ns | VCC = 2.0V; CL = 50pF, tr = tf = 6ns; TA = -40°C to 85°C | 6 |
| Maximum Propagation Delay, Clock to Output (VCC=4.5V) | tPHL, tPLH | | 13 | 44 | ns | VCC = 4.5V; CL = 50pF, tr = tf = 6ns; TA = -40°C to 85°C | 6 |
| Maximum Propagation Delay, Clock to Output (VCC=6.0V) | tPHL, tPLH | | 20 | 38 | ns | VCC = 6.0V; CL = 50pF, tr = tf = 6ns; TA = -40°C to 85°C | 6 |
| Maximum Propagation Delay, Clear to Output (VCC=2.0V) | tPHL | | 140 | 256 | ns | VCC = 2.0V; CL = 50pF, tr = tf = 6ns; TA = -40°C to 85°C | 6 |
| Maximum Propagation Delay, Clear to Output (VCC=4.5V) | tPHL | | 28 | 51 | ns | VCC = 4.5V; CL = 50pF, tr = tf = 6ns; TA = -40°C to 85°C | 6 |
| Maximum Propagation Delay, Clear to Output (VCC=6.0V) | tPHL | | 24 | 44 | ns | VCC = 6.0V; CL = 50pF, tr = tf = 6ns; TA = -40°C to 85°C | 6 |
| Minimum Removal Time, Clear to Clock (VCC=2.0V) | tREM | 0 | -7 | | ns | VCC = 2.0V; CL = 50pF, tr = tf = 6ns; TA = -40°C to 85°C | 6 |
| Minimum Removal Time, Clear to Clock (VCC=4.5V) | tREM | 0 | -3 | | ns | VCC = 4.5V; CL = 50pF, tr = tf = 6ns; TA = -40°C to 85°C | 6 |
| Minimum Removal Time, Clear to Clock (VCC=6.0V) | tREM | 0 | -2 | | ns | VCC = 6.0V; CL = 50pF, tr = tf = 6ns; TA = -40°C to 85°C | 6 |
| Minimum Setup Time, Data to Clock (VCC=2.0V) | tS | 125 | 25 | | ns | VCC = 2.0V; CL = 50pF, tr = tf = 6ns; TA = -40°C to 85°C | 6 |
| Minimum Setup Time, Data to Clock (VCC=4.5V) | tS | 25 | 14 | | ns | VCC = 4.5V; CL = 50pF, tr = tf = 6ns; TA = -40°C to 85°C | 6 |
| Minimum Setup Time, Data to Clock (VCC=6.0V) | tS | 21 | 12 | | ns | VCC = 6.0V; CL = 50pF, tr = tf = 6ns; TA = -40°C to 85°C | 6 |
| Minimum Hold Time, Clock to Data (VCC=2.0V) | tH | 5 | -2 | | ns | VCC = 2.0V; CL = 50pF, tr = tf = 6ns; TA = -40°C to 85°C | 6 |
| Minimum Hold Time, Clock to Data (VCC=4.5V) | tH | 5 | 0 | | ns | VCC = 4.5V; CL = 50pF, tr = tf = 6ns; TA = -40°C to 85°C | 6 |
| Minimum Hold Time, Clock to Data (VCC=6.0V) | tH | 5 | 1 | | ns | VCC = 6.0V; CL = 50pF, tr = tf = 6ns; TA = -40°C to 85°C | 6 |
| Minimum Pulse Width, Clear or Clock (VCC=2.0V) | tW | 100 | 22 | | ns | VCC = 2.0V; CL = 50pF, tr = tf = 6ns; TA = -40°C to 85°C | 6 |
| Minimum Pulse Width, Clear or Clock (VCC=4.5V) | tW | 20 | 11 | | ns | VCC = 4.5V; CL = 50pF, tr = tf = 6ns; TA = -40°C to 85°C | 6 |
| Minimum Pulse Width, Clear or Clock (VCC=6.0V) | tW | 18 | 10 | | ns | VCC = 6.0V; CL = 50pF, tr = tf = 6ns; TA = -40°C to 85°C | 6 |
## CAD (KiCad official)
- Symbol: `MM74HC164M`
- Footprint: `Package_SO:SOIC-14_3.9x8.7mm_P1.27mm`
- 3D model: SOIC-14 (KiCad packages3D, STEP)
- 3D model files: `mm74hc164m-etched.step` / `mm74hc164m-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `mm74hc164m.step` / `mm74hc164m.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [onsemi datasheet](https://www.onsemi.com/pdf/datasheet/mm74hc164m-d.pdf) (9 pp, sha256 `92a64a24886add33`, retrieved 2026-10-22, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/mm74hc164m-datasheet.pdf)