component
MM74HC04MX
Public Made by Adomby adom
onsemi Inverters, SOIC-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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MM74HC04MX
onsemi · Inverters · SOIC-14
MM74HC04MX from onsemi, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | A1 | input | Inverter 1 input, protected by internal diode clamps to VCC and ground. |
| 2 | Y1 | output | Inverter 1 output, able to drive 10 LS-TTL loads. |
| 3 | A2 | input | Inverter 2 input, protected by internal diode clamps to VCC and ground. |
| 4 | Y2 | output | Inverter 2 output, able to drive 10 LS-TTL loads. |
| 5 | A3 | input | Inverter 3 input, protected by internal diode clamps to VCC and ground. |
| 6 | Y3 | output | Inverter 3 output, able to drive 10 LS-TTL loads. |
| 7 | GND | power_in | Ground reference for all voltages. |
| 8 | Y4 | output | Inverter 4 output, able to drive 10 LS-TTL loads. |
| 9 | A4 | input | Inverter 4 input, protected by internal diode clamps to VCC and ground. |
| 10 | Y5 | output | Inverter 5 output, able to drive 10 LS-TTL loads. |
| 11 | A5 | input | Inverter 5 input, protected by internal diode clamps to VCC and ground. |
| 12 | Y6 | output | Inverter 6 output, able to drive 10 LS-TTL loads. |
| 13 | A6 | input | Inverter 6 input, protected by internal diode clamps to VCC and ground. |
| 14 | VCC | power_in | Positive supply, recommended 2 to 6 V, absolute maximum -0.5 to +7.0 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | onsemi |
| Package | SOIC-14 |
| Category | Logic |
| Pins | 14 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply Voltage | VCC | -0.5 | 7 | V | 2 | ||
| DC Input Voltage | VIN | -1.5 | V | Max printed as VCC + 1.5 V | 2 | ||
| DC Output Voltage | VOUT | -0.5 | V | Max printed as VCC + 0.5 V | 2 | ||
| Clamp Diode Current | IIK, IOK | -20 | 20 | mA | 2 | ||
| DC Output Current, per pin | IOUT | -25 | 25 | mA | 2 | ||
| DC VCC or GND Current, per pin | ICC | -50 | 50 | mA | 2 | ||
| Storage Temperature Range | TSTG | -65 | 150 | °C | 2 | ||
| Power Dissipation | PD | 600 | mW | Note 3 | 2 | ||
| Power Dissipation, S.O. package | PD | 500 | mW | S.O. package only | 2 | ||
| Lead Temperature | TL | 260 | °C | Soldering 10 seconds | 2 | ||
| Supply Voltage | VCC | 2 | 6 | V | 2 | ||
| DC Input or Output Voltage | VIN, VOUT | 0 | V | Max printed as VCC | 2 | ||
| Operating Temperature Range | TA | -40 | 85 | °C | 2 | ||
| Input Rise or Fall Time | tr, tf | 1000 | ns | VCC = 2.0 V | 2 | ||
| Input Rise or Fall Time | tr, tf | 500 | ns | VCC = 4.5 V | 2 | ||
| Input Rise or Fall Time | tr, tf | 400 | ns | VCC = 6.0 V | 2 | ||
| Minimum HIGH Level Input Voltage | VIH | 1.5 | V | VCC = 2.0 V; limit at TA = −40 to 85 °C | 2 | ||
| Minimum HIGH Level Input Voltage | VIH | 3.15 | V | VCC = 4.5 V; limit at TA = −40 to 85 °C | 2 | ||
| Minimum HIGH Level Input Voltage | VIH | 4.2 | V | VCC = 6.0 V; limit at TA = −40 to 85 °C | 2 | ||
| Maximum LOW Level Input Voltage | VIL | 0.5 | V | VCC = 2.0 V; limit at TA = −40 to 85 °C | 2 | ||
| Maximum LOW Level Input Voltage | VIL | 1.35 | V | VCC = 4.5 V; limit at TA = −40 to 85 °C | 2 | ||
| Maximum LOW Level Input Voltage | VIL | 1.8 | V | VCC = 6.0 V; limit at TA = −40 to 85 °C | 2 | ||
| Minimum HIGH Level Output Voltage | VOH | 1.9 | 2 | V | VIN = VIL; /IOUT/ ≤ 20 µA; VCC = 2.0 V; limit at TA = −40 to 85 °C | 2 | |
| Minimum HIGH Level Output Voltage | VOH | 4.4 | 4.5 | V | VIN = VIL; /IOUT/ ≤ 20 µA; VCC = 4.5 V; limit at TA = −40 to 85 °C | 2 | |
| Minimum HIGH Level Output Voltage | VOH | 5.9 | 6 | V | VIN = VIL; /IOUT/ ≤ 20 µA; VCC = 6.0 V; limit at TA = −40 to 85 °C | 2 | |
| Minimum HIGH Level Output Voltage | VOH | 3.84 | 4.2 | V | VIN = VIL; /IOUT/ ≤ 4.0 mA; VCC = 4.5 V; limit at TA = −40 to 85 °C | 2 | |
| Minimum HIGH Level Output Voltage | VOH | 5.34 | 5.7 | V | VIN = VIL; /IOUT/ ≤ 5.2 mA; VCC = 6.0 V; limit at TA = −40 to 85 °C | 2 | |
| Maximum LOW Level Output Voltage | VOL | 0 | 0.1 | V | VIN = VIH; /IOUT/ ≤ 20 µA; VCC = 2.0 V; limit at TA = −40 to 85 °C | 2 | |
| Maximum LOW Level Output Voltage | VOL | 0.2 | 0.33 | V | VIN = VIH; /IOUT/ ≤ 4.0 mA; VCC = 4.5 V; limit at TA = −40 to 85 °C | 2 | |
| Maximum Input Current | IIN | -1 | 0.1 | 1 | µA | VIN = VCC or GND; VCC = 6.0 V; limit at TA = −40 to 85 °C; typ printed ±0.1 | 2 |
| Maximum Quiescent Supply Current | ICC | 2 | 20 | µA | VIN = VCC or GND; IOUT = 0 µA; VCC = 6.0 V; limit at TA = −40 to 85 °C | 2 | |
| Maximum Propagation Delay | tPHL, tPLH | 8 | 15 | ns | VCC = 5V, TA = 25°C, CL = 15 pF, tr = tf = 6 ns | 3 | |
| Maximum Propagation Delay | tPHL, tPLH | 55 | 120 | ns | VCC = 2.0 V; CL = 50 pF; tr = tf = 6 ns; limit at TA = −40 to 85 °C | 3 | |
| Maximum Propagation Delay | tPHL, tPLH | 11 | 24 | ns | VCC = 4.5 V; CL = 50 pF; tr = tf = 6 ns; limit at TA = −40 to 85 °C | 3 | |
| Maximum Propagation Delay | tPHL, tPLH | 9 | 20 | ns | VCC = 6.0 V; CL = 50 pF; tr = tf = 6 ns; limit at TA = −40 to 85 °C | 3 | |
| Maximum Output Rise and Fall Time | tTLH, tTHL | 30 | 95 | ns | VCC = 2.0 V; CL = 50 pF; tr = tf = 6 ns; limit at TA = −40 to 85 °C | 3 | |
| Maximum Output Rise and Fall Time | tTLH, tTHL | 8 | 19 | ns | VCC = 4.5 V; CL = 50 pF; tr = tf = 6 ns; limit at TA = −40 to 85 °C | 3 | |
| Maximum Output Rise and Fall Time | tTLH, tTHL | 7 | 16 | ns | VCC = 6.0 V; CL = 50 pF; tr = tf = 6 ns; limit at TA = −40 to 85 °C | 3 | |
| Maximum Input Capacitance | CIN | 5 | 10 | pF | 3 |
CAD (KiCad official)
- Symbol:
MM74HC04MX - Footprint:
Package_SO:SOIC-14_3.9x8.7mm_P1.27mm - 3D model: SOIC-14 (KiCad packages3D, STEP)
- 3D model files:
mm74hc04mx-etched.step/mm74hc04mx-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);mm74hc04mx.step/mm74hc04mx.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: onsemi datasheet (7 pp, sha256
2258b81697de265b, retrieved 2026-10-19, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# MM74HC04MX
**onsemi** · Inverters · SOIC-14
MM74HC04MX from onsemi, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | A1 | input | Inverter 1 input, protected by internal diode clamps to VCC and ground. |
| 2 | Y1 | output | Inverter 1 output, able to drive 10 LS-TTL loads. |
| 3 | A2 | input | Inverter 2 input, protected by internal diode clamps to VCC and ground. |
| 4 | Y2 | output | Inverter 2 output, able to drive 10 LS-TTL loads. |
| 5 | A3 | input | Inverter 3 input, protected by internal diode clamps to VCC and ground. |
| 6 | Y3 | output | Inverter 3 output, able to drive 10 LS-TTL loads. |
| 7 | GND | power_in | Ground reference for all voltages. |
| 8 | Y4 | output | Inverter 4 output, able to drive 10 LS-TTL loads. |
| 9 | A4 | input | Inverter 4 input, protected by internal diode clamps to VCC and ground. |
| 10 | Y5 | output | Inverter 5 output, able to drive 10 LS-TTL loads. |
| 11 | A5 | input | Inverter 5 input, protected by internal diode clamps to VCC and ground. |
| 12 | Y6 | output | Inverter 6 output, able to drive 10 LS-TTL loads. |
| 13 | A6 | input | Inverter 6 input, protected by internal diode clamps to VCC and ground. |
| 14 | VCC | power_in | Positive supply, recommended 2 to 6 V, absolute maximum -0.5 to +7.0 V. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | onsemi |
| Package | SOIC-14 |
| Category | Logic |
| Pins | 14 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply Voltage | VCC | -0.5 | | 7 | V | | 2 |
| DC Input Voltage | VIN | -1.5 | | | V | Max printed as VCC + 1.5 V | 2 |
| DC Output Voltage | VOUT | -0.5 | | | V | Max printed as VCC + 0.5 V | 2 |
| Clamp Diode Current | IIK, IOK | -20 | | 20 | mA | | 2 |
| DC Output Current, per pin | IOUT | -25 | | 25 | mA | | 2 |
| DC VCC or GND Current, per pin | ICC | -50 | | 50 | mA | | 2 |
| Storage Temperature Range | TSTG | -65 | | 150 | °C | | 2 |
| Power Dissipation | PD | | | 600 | mW | Note 3 | 2 |
| Power Dissipation, S.O. package | PD | | | 500 | mW | S.O. package only | 2 |
| Lead Temperature | TL | | | 260 | °C | Soldering 10 seconds | 2 |
| Supply Voltage | VCC | 2 | | 6 | V | | 2 |
| DC Input or Output Voltage | VIN, VOUT | 0 | | | V | Max printed as VCC | 2 |
| Operating Temperature Range | TA | -40 | | 85 | °C | | 2 |
| Input Rise or Fall Time | tr, tf | | | 1000 | ns | VCC = 2.0 V | 2 |
| Input Rise or Fall Time | tr, tf | | | 500 | ns | VCC = 4.5 V | 2 |
| Input Rise or Fall Time | tr, tf | | | 400 | ns | VCC = 6.0 V | 2 |
| Minimum HIGH Level Input Voltage | VIH | 1.5 | | | V | VCC = 2.0 V; limit at TA = −40 to 85 °C | 2 |
| Minimum HIGH Level Input Voltage | VIH | 3.15 | | | V | VCC = 4.5 V; limit at TA = −40 to 85 °C | 2 |
| Minimum HIGH Level Input Voltage | VIH | 4.2 | | | V | VCC = 6.0 V; limit at TA = −40 to 85 °C | 2 |
| Maximum LOW Level Input Voltage | VIL | | | 0.5 | V | VCC = 2.0 V; limit at TA = −40 to 85 °C | 2 |
| Maximum LOW Level Input Voltage | VIL | | | 1.35 | V | VCC = 4.5 V; limit at TA = −40 to 85 °C | 2 |
| Maximum LOW Level Input Voltage | VIL | | | 1.8 | V | VCC = 6.0 V; limit at TA = −40 to 85 °C | 2 |
| Minimum HIGH Level Output Voltage | VOH | 1.9 | 2 | | V | VIN = VIL; /IOUT/ ≤ 20 µA; VCC = 2.0 V; limit at TA = −40 to 85 °C | 2 |
| Minimum HIGH Level Output Voltage | VOH | 4.4 | 4.5 | | V | VIN = VIL; /IOUT/ ≤ 20 µA; VCC = 4.5 V; limit at TA = −40 to 85 °C | 2 |
| Minimum HIGH Level Output Voltage | VOH | 5.9 | 6 | | V | VIN = VIL; /IOUT/ ≤ 20 µA; VCC = 6.0 V; limit at TA = −40 to 85 °C | 2 |
| Minimum HIGH Level Output Voltage | VOH | 3.84 | 4.2 | | V | VIN = VIL; /IOUT/ ≤ 4.0 mA; VCC = 4.5 V; limit at TA = −40 to 85 °C | 2 |
| Minimum HIGH Level Output Voltage | VOH | 5.34 | 5.7 | | V | VIN = VIL; /IOUT/ ≤ 5.2 mA; VCC = 6.0 V; limit at TA = −40 to 85 °C | 2 |
| Maximum LOW Level Output Voltage | VOL | | 0 | 0.1 | V | VIN = VIH; /IOUT/ ≤ 20 µA; VCC = 2.0 V; limit at TA = −40 to 85 °C | 2 |
| Maximum LOW Level Output Voltage | VOL | | 0.2 | 0.33 | V | VIN = VIH; /IOUT/ ≤ 4.0 mA; VCC = 4.5 V; limit at TA = −40 to 85 °C | 2 |
| Maximum Input Current | IIN | -1 | 0.1 | 1 | µA | VIN = VCC or GND; VCC = 6.0 V; limit at TA = −40 to 85 °C; typ printed ±0.1 | 2 |
| Maximum Quiescent Supply Current | ICC | | 2 | 20 | µA | VIN = VCC or GND; IOUT = 0 µA; VCC = 6.0 V; limit at TA = −40 to 85 °C | 2 |
| Maximum Propagation Delay | tPHL, tPLH | | 8 | 15 | ns | VCC = 5V, TA = 25°C, CL = 15 pF, tr = tf = 6 ns | 3 |
| Maximum Propagation Delay | tPHL, tPLH | | 55 | 120 | ns | VCC = 2.0 V; CL = 50 pF; tr = tf = 6 ns; limit at TA = −40 to 85 °C | 3 |
| Maximum Propagation Delay | tPHL, tPLH | | 11 | 24 | ns | VCC = 4.5 V; CL = 50 pF; tr = tf = 6 ns; limit at TA = −40 to 85 °C | 3 |
| Maximum Propagation Delay | tPHL, tPLH | | 9 | 20 | ns | VCC = 6.0 V; CL = 50 pF; tr = tf = 6 ns; limit at TA = −40 to 85 °C | 3 |
| Maximum Output Rise and Fall Time | tTLH, tTHL | | 30 | 95 | ns | VCC = 2.0 V; CL = 50 pF; tr = tf = 6 ns; limit at TA = −40 to 85 °C | 3 |
| Maximum Output Rise and Fall Time | tTLH, tTHL | | 8 | 19 | ns | VCC = 4.5 V; CL = 50 pF; tr = tf = 6 ns; limit at TA = −40 to 85 °C | 3 |
| Maximum Output Rise and Fall Time | tTLH, tTHL | | 7 | 16 | ns | VCC = 6.0 V; CL = 50 pF; tr = tf = 6 ns; limit at TA = −40 to 85 °C | 3 |
| Maximum Input Capacitance | CIN | | 5 | 10 | pF | | 3 |
## CAD (KiCad official)
- Symbol: `MM74HC04MX`
- Footprint: `Package_SO:SOIC-14_3.9x8.7mm_P1.27mm`
- 3D model: SOIC-14 (KiCad packages3D, STEP)
- 3D model files: `mm74hc04mx-etched.step` / `mm74hc04mx-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `mm74hc04mx.step` / `mm74hc04mx.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [onsemi datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8586193014356660224) (7 pp, sha256 `2258b81697de265b`, retrieved 2026-10-19, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/mm74hc04mx-datasheet.pdf)