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MM32F3273G8P
Public Made by Adomby adom
MindMotion Microelectronics Microcontrollers (MCU/MPU/SOC), LQFP-100(14x14). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
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MM32F3273G8P
MindMotion Microelectronics · Microcontrollers (MCU/MPU/SOC) · LQFP-100(14x14)
MM32F3273G8P from MindMotion Microelectronics, in a LQFP-100(14x14). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | PE2 | bidirectional | Standard I/O (TC type), input signal must not exceed VDD; alternate functions SPI2_SCK, I2S2_CK and FMC_A23. |
| 2 | PE3 | bidirectional | Standard I/O (TC type), input signal must not exceed VDD; alternate functions SPI2_NSS, I2S2_WS and FMC_A19. |
| 3 | PE4 | bidirectional | Standard I/O (TC type), input signal must not exceed VDD; alternate functions SPI2_NSS, I2S2_WS and FMC_A20. |
| 4 | PE5 | bidirectional | Standard I/O (TC type), input signal must not exceed VDD; alternate functions I2C2_SCL, SPI2_MISO, I2S2_MCK and FMC_A21. |
| 5 | PE6 | bidirectional | Standard I/O (TC type), input signal must not exceed VDD; alternate functions I2C2_SDA, SPI2_MOSI, I2S2_SD and FMC_A22. |
| 6 | VBAT | power_in | Backup-domain supply 1.8 V to 5.5 V for the RTC, external 32 kHz oscillator and backup registers; may be connected to VDD or left floating if no backup battery is used. |
| 7 | PC13 | bidirectional | Standard I/O (TC type), input signal must not exceed VDD; additional functions WKP1 and TAMP-RTC. |
| 8 | PC14 | bidirectional | Standard I/O (TC type), input signal must not exceed VDD; additional function OSC32_IN. |
| 9 | PC15 | bidirectional | Standard I/O (TC type), input signal must not exceed VDD; additional function OSC32_OUT. |
| 10 | VSS | power_in | Ground; all VSS and VSSA pins must be connected to the supply system within the allowed range. |
| 11 | VDD | power_in | Digital supply 2.0 V to 5.5 V (typical 3.3 V) for the I/O pins and internal regulator; VDD and VDDA must not differ by more than 300 mV. |
| 12 | PH0 | bidirectional | Standard I/O (TC type), input signal must not exceed VDD; additional function OSC_IN for the 8 to 24 MHz HSE oscillator. |
| 13 | PH1 | bidirectional | Standard I/O (TC type), input signal must not exceed VDD; additional function OSC_OUT for the 8 to 24 MHz HSE oscillator. |
| 14 | nRST | input | Active-low reset input with CMOS input and internal pull-up (RPU typical 50 kΩ); input pulses shorter than 1.0 µs are filtered out. |
| 15 | PC0 | bidirectional | Standard I/O (TC type), input signal must not exceed VDD; alternate function I2C1_SCL and ADC123_IN10 analog input. |
| 16 | PC1 | bidirectional | Standard I/O (TC type), input signal must not exceed VDD; alternate function I2C1_SDA and ADC123_IN11 analog input. |
| 17 | PC2 | bidirectional | Standard I/O (TC type), input signal must not exceed VDD; alternate functions I2C2_SCL, SPI2_MISO and I2S2_MCK, and ADC123_IN12 analog input. |
| 18 | PC3 | bidirectional | Standard I/O (TC type), input signal must not exceed VDD; alternate functions I2C2_SDA, SPI2_MOSI and I2S2_SD, and ADC123_IN13 analog input. |
| 19 | VSSA | power_in | Analog ground for the ADC, reset block, oscillators and PLL; may be connected to VSS. |
| 20 | VREF- | power_in | ADC reference ground; internally connected to VSSA in this product series. |
| 21 | VREF+ | power_in | ADC reference voltage input; internally connected to VDDA in this product series. |
| 22 | VDDA | power_in | Analog supply 2.0 V to 5.5 V for the ADC, reset block, oscillators and PLL; specified performance requires 2.5 V to 5.5 V and VDDA must equal VDD. |
| 23 | PA0 | bidirectional | Standard I/O (TC type), input signal must not exceed VDD; alternate functions TIM2_CH1, TIM2_ETR, TIM5_CH1, TIM8_ETR, UART2_CTS and UART4_TX; additional functions WKP0, ADC123_IN0, COMP12_INP0 and COMP1_INM2. |
| 24 | PA1 | bidirectional | Standard I/O (TC type), input signal must not exceed VDD; alternate functions TIM2_CH2, TIM5_CH2, UART2_RTS and UART4_RX; additional functions ADC123_IN1 and COMP12_INP1. |
| 25 | PA2 | bidirectional | Standard I/O (TC type), input signal must not exceed VDD; alternate functions TIM2_CH3, TIM5_CH3, UART2_TX and CPT2_OUT; additional functions WKP2, ADC123_IN2, COMP12_INP2 and COMP2_INM2. |
| 26 | PA3 | bidirectional | Standard I/O (TC type), input signal must not exceed VDD; alternate functions TIM2_CH4, TIM5_CH4 and UART2_RX; additional functions ADC123_IN3 and COMP12_INP3. |
| 27 | VSS | power_in | Digital ground. |
| 28 | VDD | power_in | Digital supply 2.0 V to 5.5 V (typical 3.3 V) for the I/O pins and internal regulator. |
| 29 | PA4 | bidirectional | Standard I/O (TC type), input signal must not exceed VDD; alternate functions SPI1_NSS, I2S1_WS, SPI3_NSS, I2S3_WS and UART5_TX; additional functions ADC12_IN4, DAC1_OUT and COMP12_INM0. |
| 30 | PA5 | bidirectional | Standard I/O (TC type), input signal must not exceed VDD; alternate functions TIM2_CH1, TIM2_ETR, TIM8_CH1N, SPI1_SCK, I2S1_CK and UART5_RX; additional functions ADC12_IN5, DAC2_OUT and COMP12_INM1. |
| 31 | PA6 | bidirectional | Standard I/O (TC type), input signal must not exceed VDD; alternate functions TIM1_BKIN, TIM3_CH1, TIM8_BKIN, SPI1_MISO, I2S1_MCK and CPT1_OUT; additional function ADC12_IN6. |
| 32 | PA7 | bidirectional | Standard I/O (TC type), input signal must not exceed VDD; alternate functions TIM1_CH1N, TIM3_CH2, TIM8_CH1N, SPI1_MOSI, I2S1_SD and CRS_SYNC; additional function ADC12_IN7. |
| 33 | PC4 | bidirectional | Standard I/O (TC type), input signal must not exceed VDD; additional function ADC23_IN14. |
| 34 | PC5 | bidirectional | Standard I/O (TC type), input signal must not exceed VDD; additional functions WKP3 and ADC23_IN15. |
| 35 | PB0 | bidirectional | Standard I/O (TC type), input signal must not exceed VDD; alternate functions TIM1_CH2N, TIM3_CH3, TIM8_CH2N and UART6_TX; additional function ADC12_IN8. |
| 36 | PB1 | bidirectional | Standard I/O (TC type), input signal must not exceed VDD; alternate functions TIM1_CH3N, TIM3_CH4, TIM8_CH3N and UART6_RX; additional function ADC123_IN9. |
| 37 | PB2 | bidirectional | Standard I/O (TC type), input signal must not exceed VDD; additional function BOOT1 used for boot mode selection. |
| 38 | PE7 | bidirectional | Standard I/O (TC type), input signal must not exceed VDD; alternate functions TIM1_ETR, UART7_RX and FMC_DA4. |
| 39 | PE8 | bidirectional | Standard I/O (TC type), input signal must not exceed VDD; alternate functions TIM1_CH1N, UART7_TX and FMC_DA5. |
| 40 | PE9 | bidirectional | Standard I/O (TC type), input signal must not exceed VDD; alternate functions TIM1_CH1 and FMC_DA6. |
| 41 | PE10 | bidirectional | Standard I/O (TC type), input signal must not exceed VDD; alternate functions TIM1_CH2N and FMC_DA7. |
| 42 | PE11 | bidirectional | Standard I/O (TC type), input signal must not exceed VDD; alternate functions TIM1_CH2, SPI1_NSS, I2S1_WS and FMC_DA8. |
| 43 | PE12 | bidirectional | Standard I/O (TC type), input signal must not exceed VDD; alternate functions TIM1_CH3N, SPI1_SCK, I2S1_CK and FMC_DA9. |
| 44 | PE13 | bidirectional | Standard I/O (TC type), input signal must not exceed VDD; alternate functions TIM1_CH3, SPI1_MISO, I2S1_MCK and FMC_DA10. |
| 45 | PE14 | bidirectional | Standard I/O (TC type), input signal must not exceed VDD; alternate functions TIM1_CH4, SPI1_MOSI, I2S1_SD and FMC_DA11. |
| 46 | PE15 | bidirectional | Standard I/O (TC type), input signal must not exceed VDD; alternate functions TIM1_BKIN and FMC_DA12. |
| 47 | PB10 | bidirectional | Standard I/O (TC type), input signal must not exceed VDD; alternate functions TIM2_CH3, I2C2_SCL, SPI2_SCK, I2S2_CK and UART3_TX. |
| 48 | PB11 | bidirectional | Standard I/O (TC type), input signal must not exceed VDD; alternate functions TIM2_CH4, I2C2_SDA and UART3_RX. |
| 49 | VSS | power_in | Digital ground. |
| 50 | VDD | power_in | Digital supply 2.0 V to 5.5 V (typical 3.3 V) for the I/O pins and internal regulator. |
| 51 | PB12 | bidirectional | Standard I/O (TC type), input signal must not exceed VDD; alternate functions TIM1_BKIN, SPI2_NSS and I2S2_WS. |
| 52 | PB13 | bidirectional | Standard I/O (TC type), input signal must not exceed VDD; alternate functions TIM1_CH1N, SPI2_SCK, I2S2_CK and UART3_CTS. |
| 53 | PB14 | bidirectional | Standard I/O (TC type), input signal must not exceed VDD; alternate functions TIM1_CH2N, TIM8_CH2N, SPI2_MISO, I2S2_MCK and UART3_RTS. |
| 54 | PB15 | bidirectional | Standard I/O (TC type), input signal must not exceed VDD; alternate functions TIM1_CH3N, TIM8_CH3N, SPI2_MOSI and I2S2_SD; additional function WKP5. |
| 55 | PD8 | bidirectional | Standard I/O (TC type), input signal must not exceed VDD; alternate functions UART3_TX and FMC_DA13. |
| 56 | PD9 | bidirectional | Standard I/O (TC type), input signal must not exceed VDD; alternate functions UART3_RX and FMC_DA14. |
| 57 | PD10 | bidirectional | Standard I/O (TC type), input signal must not exceed VDD; alternate functions I2C1_SCL and FMC_DA15. |
| 58 | PD11 | bidirectional | Standard I/O (TC type), input signal must not exceed VDD; alternate functions I2C1_SDA, UART3_CTS and FMC_A16. |
| 59 | PD12 | bidirectional | Standard I/O (TC type), input signal must not exceed VDD; alternate functions TIM4_CH1, SPI3_SCK, I2S3_CK, UART3_RTS and FMC_A17. |
| 60 | PD13 | bidirectional | Standard I/O (TC type), input signal must not exceed VDD; alternate functions TIM4_CH2, SPI3_MISO, I2S3_MCK and FMC_A18. |
| 61 | PD14 | bidirectional | Standard I/O (TC type), input signal must not exceed VDD; alternate functions TIM4_CH3, SPI3_MOSI and FMC_DA0. |
| 62 | PD15 | bidirectional | Standard I/O (TC type), input signal must not exceed VDD; alternate functions TIM4_CH4, SPI3_NSS, I2S3_WS and FMC_DA1. |
| 63 | PC6 | bidirectional | Standard I/O (TC type), input signal must not exceed VDD; alternate functions TIM3_CH1, TIM8_CH1, I2C1_SCL, SPI2_MISO, I2S2_MCK and UART6_TX. |
| 64 | PC7 | bidirectional | Standard I/O (TC type), input signal must not exceed VDD; alternate functions TIM3_CH2, TIM8_CH2, I2C1_SDA, SPI3_MISO, I2S3_MCK and UART6_RX. |
| 65 | PC8 | bidirectional | Standard I/O (TC type), input signal must not exceed VDD; alternate functions TIM3_CH3, TIM8_CH3, I2C2_SCL and SDIO_D0. |
| 66 | PC9 | bidirectional | Standard I/O (TC type), input signal must not exceed VDD; alternate functions MCO2, TIM3_CH4, TIM8_CH4, I2C2_SDA and SDIO_D1. |
| 67 | PA8 | bidirectional | Standard I/O (TC type), input signal must not exceed VDD; alternate functions MCO1 and TIM1_CH1. |
| 68 | PA9 | bidirectional | Standard I/O (TC type), input signal must not exceed VDD; alternate functions TIM1_CH2, I2C1_SCL and UART1_TX; USB_VBUS when USB is enabled, pin is then dedicated to USB function. |
| 69 | PA10 | bidirectional | Standard I/O (TC type), input signal must not exceed VDD; alternate functions TIM1_CH3, I2C1_SDA and UART1_RX; USB_ID when USB is enabled, pin is then dedicated to USB function. |
| 70 | PA11 | bidirectional | Standard I/O (TC type), input signal must not exceed VDD; alternate functions TIM1_CH4, UART1_CTS, CPT1_OUT and CAN1_RX; USBDM when USB is enabled, pin is then dedicated to USB function. |
| 71 | PA12 | bidirectional | Standard I/O (TC type), input signal must not exceed VDD; alternate functions TIM1_ETR, UART1_RTS, CPT2_OUT and CAN1_TX; USBDP when USB is enabled, pin is then dedicated to USB function. |
| 72 | PA13 | bidirectional | Standard I/O (TC type), input signal must not exceed VDD; main function JTMS_SWDIO and alternate function USB_VBUS_ON. |
| 73 | PH2 | bidirectional | Standard I/O (TC type), input signal must not exceed VDD; no alternate function listed. |
| 74 | VSS | power_in | Digital ground. |
| 75 | VDD | power_in | Digital supply 2.0 V to 5.5 V (typical 3.3 V) for the I/O pins and internal regulator. |
| 76 | PA14 | bidirectional | Standard I/O (TC type), input signal must not exceed VDD; main function JTCK_SWCLK and alternate function I2C1_SDA. |
| 77 | PA15 | bidirectional | Standard I/O (TC type), input signal must not exceed VDD; main function JTDI and alternate functions TIM2_CH1, TIM2_ETR, I2C1_SCL, SPI1_NSS, I2S1_WS, SPI3_NSS and I2S3_WS. |
| 78 | PC10 | bidirectional | Standard I/O (TC type), input signal must not exceed VDD; alternate functions SPI3_SCK, I2S3_CK, UART3_TX, UART4_TX and SDIO_D2. |
| 79 | PC11 | bidirectional | Standard I/O (TC type), input signal must not exceed VDD; alternate functions SPI3_MISO, I2S3_MCK, UART3_RX, UART4_RX and SDIO_D3. |
| 80 | PC12 | bidirectional | Standard I/O (TC type), input signal must not exceed VDD; alternate functions SPI3_MOSI, UART5_TX and SDIO_CK. |
| 81 | PD0 | bidirectional | Standard I/O (TC type), input signal must not exceed VDD; alternate functions UART8_TX, CAN1_RX and FMC_DA2. |
| 82 | PD1 | bidirectional | Standard I/O (TC type), input signal must not exceed VDD; alternate functions UART8_RX, CAN1_TX and FMC_DA3. |
| 83 | PD2 | bidirectional | Standard I/O (TC type), input signal must not exceed VDD; alternate functions TIM3_ETR, UART5_RX and SDIO_CMD. |
| 84 | PD3 | bidirectional | Standard I/O (TC type), input signal must not exceed VDD; alternate functions SPI2_SCK, I2S2_CK, UART2_CTS and FMC_CLK. |
| 85 | PD4 | bidirectional | Standard I/O (TC type), input signal must not exceed VDD; alternate functions SPI3_SCK, I2S3_CK, UART2_RTS and FMC_NOE. |
| 86 | PD5 | bidirectional | Standard I/O (TC type), input signal must not exceed VDD; alternate functions SPI3_MISO, I2S3_MCK, UART2_TX and FMC_NWE. |
| 87 | PD6 | bidirectional | Standard I/O (TC type), input signal must not exceed VDD; alternate functions SPI3_MOSI, I2S3_SD, UART2_RX and FMC_NWAIT. |
| 88 | PD7 | bidirectional | Standard I/O (TC type), input signal must not exceed VDD; alternate functions SPI3_NSS, I2S3_WS and FMC_NE1. |
| 89 | PB3 | bidirectional | Standard I/O (TC type), input signal must not exceed VDD; main function JTDO and alternate functions TIM2_CH2, SPI1_SCK, I2S1_CK, SPI3_SCK and I2S3_CK. |
| 90 | PB4 | bidirectional | Standard I/O (TC type), input signal must not exceed VDD; main function NJTRST and alternate functions TIM3_CH1, SPI1_MISO, I2S1_MCK, SPI3_MISO and I2S3_MCK. |
| 91 | PB5 | bidirectional | Standard I/O (TC type), input signal must not exceed VDD; alternate functions TIM3_CH2, SPI1_MOSI, I2S1_SD, SPI3_MOSI and I2S3_SD; additional function WKP4. |
| 92 | PB6 | bidirectional | Standard I/O (TC type), input signal must not exceed VDD; alternate functions TIM4_CH1, I2C1_SCL, UART1_TX and UART7_TX. |
| 93 | PB7 | bidirectional | Standard I/O (TC type), input signal must not exceed VDD; alternate functions TIM4_CH2, I2C1_SDA, UART1_RX, UART7_RX and FMC_NADV. |
| 94 | PH3 | bidirectional | Standard I/O (TC type), input signal must not exceed VDD; additional function BOOT0 used for boot mode selection. |
| 95 | PB8 | bidirectional | Standard I/O (TC type), input signal must not exceed VDD; alternate functions TIM4_CH3, I2C1_SCL, CPT1_OUT and CAN1_RX. |
| 96 | PB9 | bidirectional | Standard I/O (TC type), input signal must not exceed VDD; alternate functions TIM4_CH4, I2C1_SDA, SPI2_NSS, I2S2_WS, CPT2_OUT and CAN1_TX. |
| 97 | PE0 | bidirectional | Standard I/O (TC type), input signal must not exceed VDD; alternate functions TIM4_ETR, UART8_RX and FMC_NBL0. |
| 98 | PE1 | bidirectional | Standard I/O (TC type), input signal must not exceed VDD; alternate functions UART8_TX and FMC_NBL1. |
| 99 | VSS | power_in | Digital ground. |
| 100 | VDD | power_in | Digital supply 2.0 V to 5.5 V (typical 3.3 V) for the I/O pins and internal regulator. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | MindMotion Microelectronics |
| Package | LQFP-100(14x14) |
| Category | Embedded Processors & Controllers |
| Pins | 100 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| fHCLK3 internal AHB3 clock frequency | fHCLK3 | 96 | 120 | MHz | 120M 时 Core 电压需提升到 1.7V | 51 | |
| fHCLK2 internal AHB2 clock frequency | fHCLK2 | 96 | 120 | MHz | 120M 时 Core 电压需提升到 1.7V | 51 | |
| fHCLK1 internal AHB1 clock frequency | fHCLK1 | 96 | 120 | MHz | 120M 时 Core 电压需提升到 1.7V | 51 | |
| fPCLK2 internal APB2 clock frequency | fPCLK2 | 96 | 120 | MHz | 120M 时 Core 电压需提升到 1.7V | 51 | |
| fPCLK1 internal APB1 clock frequency | fPCLK1 | 96 | 120 | MHz | 120M 时 Core 电压需提升到 1.7V | 51 | |
| VDD digital operating voltage | VDD | 2 | 3.3 | 5.5 | V | 52 | |
| VDDA analog operating voltage (performance guaranteed) | VDDA | 2.5 | 3.3 | 5.5 | V | 性能满足本手册指标,必须与 VDD 相同 | 52 |
| VDDA analog operating voltage (performance not guaranteed) | VDDA | 2 | 2.5 | V | 不保证性能满足本手册指标 | 52 | |
| VBAT backup domain operating voltage | VBAT | 1.8 | 5.5 | V | 后备域工作电压 | 52 | |
| Power dissipation LQFP100 | PD | 444 | mW | TA = 85℃ 或 TA = 105℃ | 52 | ||
| Ambient temperature (industrial) | TA | -40 | 85 | ℃ | 环境温度(工业型) | 52 | |
| Junction temperature range | TJ | -40 | 105 | ℃ | 结温范围 | 52 | |
| VDD rise time | tr | 10 | 500000 | us | 52 | ||
| VDD fall time | tf | 50 | us | 52 | |||
| External main supply voltage (includes VDDA and VSSA) | VDDx-VSSx | -0.3 | 5.8 | V | 51 | ||
| Backup domain supply voltage | VBAT-VSSx | -0.3 | 5.8 | V | 51 | ||
| Total supply current through VDD/VDDA | IVDD/VDDA | 120 | mA | 51 | |||
| Total ground current through VSS/VSSA | IVSS/VSSA | -120 | mA | 51 | |||
| Output sink current on any I/O and control pin | IIO | 25 | mA | 51 | |||
| Output source current on any I/O and control pin | IIO | -25 | mA | 51 | |||
| Injection current on NRST pin | IINJ(PIN) | -5 | 5 | mA | 51 | ||
| Injection current on HSE OSC_IN pin | IINJ(PIN) | -5 | 5 | mA | 51 | ||
| Sum of injection currents on other pins | ΣIINJ(PIN) | -25 | 25 | mA | 51 | ||
| HSE oscillator frequency | fOSC_IN | 2 | 8 | 12 | MHz | 2V<VDD<3.6V | 61 |
| HSE oscillator frequency | fOSC_IN | 8 | 16 | 24 | MHz | 3.0V<VDD<5.5V | 61 |
| Crystal series resistance (ESR) | ESR | 60 | Ω | fOSC_IN =24MHz, VDD=3V; CL1 CL2 为16pF | 61 | ||
| Crystal series resistance (ESR) | ESR | 150 | Ω | fOSC_IN =12MHz, VDD=2V; CL1 CL2 为16pF | 61 | ||
| User external clock frequency (HSE) | fHSE_ext | 8 | 32 | MHz | 59 | ||
| OSC_IN high or low time (HSE) | tw(HSE) | 15 | ns | 59 | |||
| User external clock frequency (LSE) | fLSE_ext | 32.768 | 1000 | KHz | 60 | ||
| OSC_IN high or low time (LSE) | tw(LSE) | 250 | ns | 60 | |||
| LSE oscillator start-up time | tSU(LSE) | 1 | 3 | S | VDD是稳定的 | 62 | |
| HSI oscillator accuracy | ACCHSI | -2.5 | 2.5 | % | TA = -40℃~105℃ | 63 | |
| HSI oscillator accuracy | ACCHSI | -1 | 1 | % | TA = 25°C | 63 | |
| HSI oscillator start-up time | tSU(HSI) | 5 | us | 63 | |||
| HSI oscillator stabilization time | Tstab(HSI) | 10 | us | 63 | |||
| LSI oscillator start-up time | tSU(LSI) | 50 | us | 64 | |||
| PLL input clock frequency | fPLL_IN | 4 | 8 | 24 | MHz | 64 | |
| PLL input clock duty cycle | DPLL_IN | 20 | 80 | % | 64 | ||
| PLL VCO output frequency range | fvco | 200 | 400 | MHz | 64 | ||
| PLL output clock frequency | fPLL_OUT | 12.5 | 200 | MHz | 64 | ||
| PLL lock time | tLOCK | 21.5 | 60 | us | Input clock=8MHz; Output clock=100MHz; Tolerance=0.1% | 64 | |
| Flash endurance (erase/write cycles) | NEND | 20000 | 次 | 65 | |||
| Flash data retention | TDR | 100 | Years | TA = 25℃ | 65 | ||
| Flash average supply current, read mode | IDD | 6 | mA | 读模式 40MHz | 65 | ||
| Flash average supply current, write mode | IDD | 7 | mA | 写模式 | 65 | ||
| Flash average supply current, erase mode | IDD | 2 | mA | 擦除模式 | 65 | ||
| ESD voltage, human body model | VESD(HBM) | -6000 | 6000 | V | TA = 25◦C,符合 ESDA/JEDEC JS-001-2017 | 66 | |
| ESD voltage, charged device model | VESD(CDM) | -1500 | 1500 | V | TA = 25◦C,符合 ESDA/JEDEC JS-002-2018 | 66 | |
| Latch-up current | ILU | -100 | 100 | mA | TA = 25◦C,符合 JESD78E | 66 | |
| Input low-level voltage, 3.3V CMOS port | VIL | 1.47 | V | 3.3V CMOS 端口 | 66 | ||
| Input low-level voltage, 5V CMOS port | VIL | 2.26 | V | 5V CMOS 端口 | 66 | ||
| Input high-level voltage, 3.3V CMOS port | VIH | 1.74 | V | 3.3V CMOS 端口 | 66 | ||
| Input high-level voltage, 5V CMOS port | VIH | 2.61 | V | 5V CMOS 端口 | 67 | ||
| I/O pin capacitance | CIO | 1 | pF | 67 | |||
| NRST input low-level voltage | VIL(NRST) | 1.47 | V | VDD=3.3V | 69 | ||
| NRST input high-level voltage | VIH(NRST) | 1.74 | V | VDD=3.3V | 69 | ||
| NRST weak pull-up equivalent resistance | RPU | 25 | 50 | 85 | kΩ | VIN = VSS | 69 |
| NRST input filtered pulse | VF(NRST) | 1 | us | 69 | |||
| NRST input non-filtered pulse | VNF(NRST) | 4 | us | 69 |
CAD (KiCad official)
- Symbol:
MM32F3273G8P - Footprint:
Package_QFP:LQFP-100_14x14mm_P0.5mm - 3D model: LQFP-100(14x14) (KiCad packages3D, STEP)
- 3D model files:
mm32f3273g8p-etched.step/mm32f3273g8p-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);mm32f3273g8p.step/mm32f3273g8p.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: MindMotion Microelectronics datasheet (96 pp, sha256
e40e1345aed0e077, retrieved 2026-10-20, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).