component

MM32F0144C4P

Public Made by Adom

by adom

MindMotion Microelectronics Microcontrollers (MCU/MPU/SOC), LQFP-32(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentembedded processors & controllersmm32f0144c4pfactory-2.0.0extractor-text
Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity
main
Download ZIP Propose a change
Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 6d ago
viewers mm32f0144c4p: viewers · Ray 6d ago
mm32f0144c4p-etched.glb Publish 0.1.0 · Ray 6d ago
mm32f0144c4p-etched.step mm32f0144c4p: factory component page (tier=lcsc) · Ray 6d ago
mm32f0144c4p-hero.glb mm32f0144c4p: hero GLB from the etched model (keeps the MPN mark) · Ray 6d ago
mm32f0144c4p-hero.overlay.json Publish 0.1.0 · Ray 6d ago
mm32f0144c4p.glb Publish 0.1.0 · Ray 6d ago
mm32f0144c4p.kicad_mod Publish 0.1.0 · Ray 6d ago
mm32f0144c4p.kicad_sym Publish 0.1.0 · Ray 6d ago
mm32f0144c4p.lbr Publish 0.1.0 · Ray 6d ago
mm32f0144c4p.step Publish 0.1.0 · Ray 6d ago
package.json Publish 0.1.0 · Ray 6d ago
page.json Set visibility: public · Ray 6d ago
README.md Publish 0.1.0 · Ray 6d ago

MM32F0144C4P

MindMotion Microelectronics · Microcontrollers (MCU/MPU/SOC) · LQFP-32(7x7)

MM32F0144C4P from MindMotion Microelectronics, in a LQFP-32(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VDD power_in Digital circuit operating voltage for the I/O pins and internal regulator, specified at 2.0 V to 5.5 V.
2 PD0-OSC_IN bidirectional Standard I/O (TC level, input must not exceed VDD) with UART3_TX and I2C_SDA alternate functions, also used as the HSE oscillator input OSC_IN.
3 PD1-OSC_OUT bidirectional Standard I/O (TC level, input must not exceed VDD) with UART3_RX and I2C_SCL alternate functions, also used as the HSE oscillator output OSC_OUT.
4 NRST bidirectional Active-low reset pin with an internal pull-up resistor (typ. 60 kΩ), with VIL max 1.4 V and VIH min 2.0 V at VDD = 3.3 V.
5 VDDA power_in Analog supply for the ADC, reset module, oscillator and PLL, guaranteed at 2.5 V to 5.5 V (must equal VDD) with performance not guaranteed from 2.0 V to 2.5 V.
6 PA0-WKUP bidirectional Standard I/O (TC level) with WKUP wake-up function and alternate functions UART2_CTS, TIM2_CH1/TIM2_ETR, SPI2_NSS/I2S2_WS, TIM2_CH3, COMP1_OUT and ADC1_VIN[0].
7 PA1 bidirectional Standard I/O (TC level) with alternate functions UART2_RTS, TIM2_CH2, ADC1_VIN[1] and COMP_INP[0].
8 PA2 bidirectional Standard I/O (TC level) with alternate functions UART2_TX, TIM2_CH3, SPI2_NSS/I2S2_WS, ADC1_VIN[2] and COMP_INP[1].
9 PA3 bidirectional Standard I/O (TC level) with alternate functions UART2_RX, TIM2_CH4, ADC1_VIN[3] and COMP_INP[2].
10 PA4 bidirectional Standard I/O (TC level) with alternate functions SPI1_NSS/I2S1_WS, TIM1_BKIN, TIM14_CH1, I2C_SDA, ADC1_VIN[4] and COMP_INP[3].
11 PA5 bidirectional Standard I/O (TC level) with alternate functions SPI1_SCK/I2S1_CK, TIM2_CH1/TIM2_ETR, TIM1_ETR, I2C_SCL, TIM1_CH3N, ADC1_VIN[5] and COMP_INM[0].
12 PA6 bidirectional Standard I/O (TC level) with alternate functions SPI1_MISO/I2S1_MCK, TIM3_CH1, TIM1_BKIN, UART2_RX, TIM1_ETR, TIM16_CH1, TIM1_CH3, COMP1_OUT, ADC1_VIN[6] and COMP_INM[1].
13 PA7 bidirectional Standard I/O (TC level) with alternate functions SPI1_MOSI/I2S1_SD, TIM3_CH2, TIM1_CH1N, TIM14_CH1, TIM17_CH1, TIM1_CH2N, TIM1_CH3N, ADC1_VIN[7] and COMP_INM[2].
14 PB0 bidirectional Standard I/O (TC level) with alternate functions TIM3_CH3, TIM1_CH2N, TIM1_CH1N, TIM1_CH3 and ADC1_VIN[8].
15 PB1 bidirectional Standard I/O (TC level) with alternate functions TIM14_CH1, TIM3_CH4, TIM1_CH3N, TIM1_CH4, TIM1_CH2N, MCO, TIM1_CH2, TIM1_CH1N and ADC1_VIN[9].
16 VSS power_in Ground pin for the digital circuits and I/O.
17 VDD power_in Digital circuit operating voltage for the I/O pins and internal regulator, specified at 2.0 V to 5.5 V.
18 PA8 bidirectional Standard I/O (TC level) with alternate functions MCO, TIM1_CH1, TIM1_CH2 and TIM1_CH3.
19 PA9 bidirectional Standard I/O (TC level) with alternate functions UART1_TX, TIM1_CH2, UART1_RX, I2C_SCL, MCO, TIM1_CH1N, TIM1_CH4 and CAN_RX.
20 PA10 bidirectional Standard I/O (TC level) with alternate functions TIM17_BKIN, UART1_RX, TIM1_CH3, UART1_TX, I2C_SDA, TIM1_CH1, SPI2_SCK/I2S2_CK and CAN_TX.
21 PA11 bidirectional Standard I/O (TC level) with alternate functions UART3_TX, UART1_CTS, TIM1_CH4, CAN_RX, SPI2_MOSI/I2S2_SD, I2C_SCL and COMP1_OUT.
22 PA12 bidirectional Standard I/O (TC level) with alternate functions UART3_RX, UART1_RTS, TIM1_ETR, CAN_TX, SPI2_MISO/I2S2_MCK, I2C_SDA and TIM1_CH2.
23 PA13 bidirectional Standard I/O (TC level) with SWDIO debug data function and alternate functions UART1_TX, SPI2_MISO/I2S2_MCK, MCO, TIM1_CH2 and TIM1_BKIN.
24 PA14 bidirectional Standard I/O (TC level) with SWDCLK debug clock function and alternate functions UART2_TX, UART1_RX and SPI1_NSS/I2S1_WS.
25 PA15 bidirectional Standard I/O (TC level) with alternate functions SPI1_NSS/I2S1_WS, UART2_RX and TIM2_CH1/TIM2_ETR.
26 PB3 bidirectional Standard I/O (TC level) with alternate functions SPI1_SCK/I2S1_CK, TIM2_CH2, UART1_TX, TIM2_CH3, TIM1_CH1, TIM2_CH1 and ADC1_VIN[10].
27 PB4 bidirectional Standard I/O (TC level) with alternate functions SPI1_MISO/I2S1_MCK, TIM3_CH1, UART1_RX, TIM17_BKIN, TIM1_CH2, TIM2_CH2 and ADC1_VIN[11].
28 PB5 bidirectional Standard I/O (TC level) with alternate functions SPI1_MOSI/I2S1_SD, TIM3_CH2, TIM16_BKIN, MCO, TIM1_CH3 and TIM2_CH3.
29 PB6 bidirectional Standard I/O (TC level) with alternate functions UART1_TX, I2C_SCL, TIM16_CH1N and TIM2_CH1.
30 PB7 bidirectional Standard I/O (TC level) with alternate functions UART1_RX, I2C_SDA, TIM17_CH1N, UART2_TX and ADC1_VIN[12].
31 PD5-BOOT0 bidirectional Standard I/O (TC level) that also serves as the BOOT0 pin used together with nBOOT1 to select the startup mode.
32 VSS power_in Ground pin for the digital circuits and I/O.

Key specifications

Parameter Value
Manufacturer MindMotion Microelectronics
Package LQFP-32(7x7)
Category Embedded Processors & Controllers
Pins 32

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
VDDx-VSSx External main supply voltage (including VDDA and VSSA) VDDx-VSSx -0.3 5.8 V 43
Output sink current on any I/O and control pins IIO 25 mA 43
Output current on any I/O and control pins IIO -25 mA 43
NRST pin injection current IINJ(PIN) -5 5 mA 43
HSE OSC_IN pin injection current IINJ(PIN) -5 5 mA 43
Other pins injection current ∑IINJ(PIN) -25 25 mA 43
Total current through VDD/VDDA power pins (supply current) IVDD/VDDA 120 mA 43
Total current through VSS/VSSA ground pins (outflow current) IVSS/VSSA -120 mA 43
Internal AHB clock frequency fHCLK 72 MHz 44
Internal APB2 clock frequency fPCLK2 72 MHz 44
Internal APB1 clock frequency fPCLK1 72 MHz 44
Digital circuit operating voltage VDD 2 3.3 5.5 V 44
Analog circuit operating voltage (performance guaranteed) VDDA 2.5 3.3 5.5 V Performance is guaranteed; must be the same as VDD 44
Analog circuit operating voltage (performance not guaranteed) VDDA 2 2.5 V Performance is not guaranteed 44
Power dissipation LQFP32 PD 333 mW TA = 85°C or TA = 105°C 44
Ambient temperature (industrial level) TA -40 85 °C 44
Ambient temperature (extended industrial level) TA -40 105 °C 44
Junction temperature (industrial level) TJ -40 105 °C 44
Junction temperature (extended industrial level) TJ -40 125 °C 44
VDD rise time tr 1 us 45
VDD fall time tf 400 us 45
ADC sampling time when reading built-in voltage reference Ts_vrefint 11.8 us 46
Supply current in Stop mode (max at 25°C) IDD 70.22 150 μA Enter Stop mode after reset, VDD=3.3V; maximum column 25°C 48
Supply current in Stop mode (max at -40~105°C) IDD 324 μA Enter Stop mode after reset, VDD=3.3V; maximum column -40~105°C 48
Supply current in Deep Stop mode (max at 25°C) IDD 1.67 5 μA Enter Deep Stop mode after reset, VDD=3.3V; maximum column 25°C 48
Supply current in Deep Stop mode (max at -40~105°C) IDD 55 μA Enter Deep Stop mode after reset, VDD=3.3V; maximum column -40~105°C 48
Supply current in Standby mode (max at 25°C) IDD 0.41 3 μA IWDG disabled; maximum column 25°C 48
Supply current in Standby mode (max at -40~105°C) IDD 5.62 μA IWDG disabled; maximum column -40~105°C 48
User external clock source frequency fHSE_ext 8 32 MHz 50
OSC_IN high or low time tw(HSE) 15 ns 50
External clock source frequency fOSC_IN 4 8 12 MHz 2V<VDD<3.6V 50
Oscillator frequency fOSC_IN 8 16 24 MHz 3.0V<VDD<5.5V 51
Support crystal serial impedance (ESR) ESR 50 Ω fOSC_IN =24MHz, VDD=3V 51
Support crystal serial impedance (ESR) ESR 120 Ω fOSC_IN =12MHz, VDD=2V 51
HSI oscillator deviation ACCHSI -2.5 2.5 % TA = -40°C~105°C 52
HSI oscillator deviation ACCHSI -2 2 % TA = -20°C~85°C 52
HSI oscillator deviation ACCHSI -1 1 % TA = 25°C 52
HSI oscillator startup time Tstab(HSI) 20 μs 52
LSI oscillator frequency fLSI 20 40 70 KHz TA = -40°C~105°C 52
LSI oscillator startup time tSU(LSI) 100 μs 52
PLL input clock fPLL_IN 4 8 24 MHz 52
PLL input clock duty cycle DPLL_IN 20 80 % 52
VCO output clock fvco 80 200 MHz 52
PLL output clock fPLL_OUT 40 100 MHz 53
16-bit programming time tprog 131.5 154.5 μs 53
Page (1024 bytes) erase time tERASE 4 6 ms 53
Mass erase time tME 30 40 ms 53
Endurance NEND 100000 Cycles 53
Data retention TDR 10 Years TA = 105°C 53
Electrostatic discharge voltage (Human body model) VESD(HBM) -6000 6000 V TA = 25°C, conforming to ESDA/JEDEC JS-001-2017 55
Electrostatic discharge voltage (Charging device model) VESD(CDM) -2000 2000 V TA = 25°C, conforming to ESDA/JEDEC JS-002-2018 55
Latch-up current ILU -300 300 mA TA = 105°C, conforming to JESD78E 55
Low level input voltage VIL 0.8 V VDD = 3.3V 55
High level input voltage VIH 2 V VDD = 3.3V 55
Weak pull-up equivalent resistor RPU 50 60 75 kΩ VDD = 3.3V, VIN = VSS 55
Weak pull-down equivalent resistor RPD 50 60 75 kΩ VDD = 3.3V, VIN = VDD 55
I/O pin capacitance CIO 10 pF 55
NRST input low voltage VIL(NRST) 1.4 V VDD=3.3V 58
NRST input high voltage VIH(NRST) 2 V VDD=3.3V 58
NRST weak pull-up equivalent resistor RPU 50 60 75 kΩ VIN = VSS 58

CAD (KiCad official)

  • Symbol: MM32F0144C4P
  • Footprint: Package_QFP:LQFP-32_7x7mm_P0.8mm
  • 3D model: LQFP-32(7x7) (KiCad packages3D, STEP)
  • 3D model files: mm32f0144c4p-etched.step / mm32f0144c4p-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); mm32f0144c4p.step / mm32f0144c4p.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: MindMotion Microelectronics datasheet (81 pp, sha256 d992e437405b5332, retrieved 2026-10-20, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF