component
MLX90333LDC-BCT-000-RE
Public Made by Adomby adom
Melexis(比利时迈来芯) 3D Magnetic Sensors, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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MLX90333LDC-BCT-000-RE
Melexis(比利时迈来芯) · 3D Magnetic Sensors · SOIC-8
MLX90333LDC-BCT-000-RE from Melexis(比利时迈来芯), in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VDD | power_in | Supply pin; the absolute maximum supply overvoltage is +20 V and the reverse voltage protection is -10 V. |
| 2 | Test 0 | passive | Test pin that is recommended to be connected to ground for optimal EMC behaviour. |
| 3 | Not Used /SS | input | Not used in Analog/PWM mode and used as /SS (Slave Select) in Serial Protocol mode; the pinout table gives no electrical limits for it. |
| 4 | OUT2 / SCLK | output | OUT2 is the second ratiometric analog or PWM output in Analog/PWM mode, with absolute limits of +10 V (+14 V for 200 µs max at 25 °C), output current ±30 mA, reverse output voltage -0.3 V and reverse output current -50 mA; it is SCLK in Serial Protocol mode. |
| 5 | OUT1 / MOSI/MISO | bidirectional | OUT1 is the first ratiometric analog or PWM output in Analog/PWM mode, with absolute limits of +10 V (+14 V for 200 µs max at 25 °C), output current ±30 mA, reverse output voltage -0.3 V and reverse output current -50 mA; it is MOSI/MISO in Serial Protocol mode. |
| 6 | Test 1 | passive | Test pin that is recommended to be connected to ground for optimal EMC behaviour. |
| 7 | VDIG | power_in | Pinout lists this as the digital supply pin; the extracted pages give no electrical limits for it. |
| 8 | VSS | power_in | Ground reference (GND) for the device. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Melexis(比利时迈来芯) |
| Package | SOIC-8 |
| Category | Magnetic Sensors |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply Voltage, VDD (overvoltage) | VDD | 20 | V | 9 | |||
| Reverse Voltage Protection | -10 | V | 9 | ||||
| Positive Output Voltage (Analog or PWM), Both Outputs OUT1 and OUT2 | 10 | V | 9 | ||||
| Positive Output Voltage (Analog or PWM), Both Outputs OUT1 and OUT2 | 14 | V | 200 s max, TA = + 25 Deg.C | 9 | |||
| Output Current (IOUT) | IOUT | -30 | 30 | mA | 9 | ||
| Reverse Output Voltage, Both Outputs OUT1 and OUT2 | -0.3 | V | 9 | ||||
| Reverse Output Current, Both Outputs OUT1 and OUT2 | -50 | mA | 9 | ||||
| Operating Ambient Temperature Range | TA | -40 | 150 | Deg.C | 9 | ||
| Storage Temperature Range | TS | -40 | 150 | Deg.C | 9 | ||
| Magnetic Flux Density | -4 | 4 | T | 9 | |||
| Nominal Supply Voltage | VDD | 4.5 | 5 | 5.5 | V | 10 | |
| Supply Current (slow mode) | IDD | 8.5 | 11 | mA | Slow mode | 10 | |
| Supply Current (fast mode) | IDD | 13.5 | 16 | mA | Fast mode | 10 | |
| POR Supply Under Voltage | VDD | 2 | 2.7 | 3 | V | POR Supply Under Voltage | 10 |
| Output Current, Both Outputs OUT1 and OUT2 (Analog Output mode) | IOUT | -8 | 8 | mA | Analog Output mode | 10 | |
| Output Current, Both Outputs OUT1 and OUT2 (PWM Output mode) | IOUT | -20 | 20 | mA | PWM Output mode | 10 | |
| Output Short Circuit Current, Both Outputs OUT1 and OUT2 | Ishort | 12 | 15 | mA | VOUT = 0 V | 10 | |
| Output Short Circuit Current, Both Outputs OUT1 and OUT2 | Ishort | 24 | 45 | mA | VOUT = 14 V (TA = 25 Deg.C) | 10 | |
| Output Load, Both Outputs OUT1 and OUT2 | RL | 1 | 10 | kΩ | Pull-down to Ground | 10 | |
| Output Load, Both Outputs OUT1 and OUT2 | RL | 1 | kΩ | Pull-up to 5V (4); max printed as ∞ (5) | 10 | ||
| Analog Saturation Output Level, Low (Vsat_lo) | Vsat_lo | 3 | %VDD | Pull-up load RL ≥ 10 kΩ | 10 | ||
| Analog Saturation Output Level, High (Vsat_hi) | Vsat_hi | 96 | %VDD | Pull-down load RL ≥ 5 kΩ | 10 | ||
| Digital Saturation Output Level, Low (VsatD_lo) | VsatD_lo | 1.5 | %VDD | Pull-up Low Side RL ≥ 10 kΩ, Push-Pull (IOUT = -20mA) | 10 | ||
| Digital Saturation Output Level, High (VsatD_hi) | VsatD_hi | 97 | %VDD | Push-Pull (IOUT = 20mA) | 10 | ||
| Active Diagnostic Output Level, Low (Diag_lo) | Diag_lo | 1 | %VDD | Pull-down load RL ≥ 5 kΩ | 10 | ||
| Active Diagnostic Output Level, Low (Diag_lo) | Diag_lo | 1.5 | %VDD | Pull-up load RL ≥ 10 kΩ | 10 | ||
| Active Diagnostic Output Level, High (Diag_hi) | Diag_hi | 96 | %VDD | Pull-down load RL ≥ 5 kΩ | 10 | ||
| Active Diagnostic Output Level, High (Diag_hi) | Diag_hi | 98 | %VDD | Pull-up load RL ≥ 5 kΩ | 10 | ||
| Passive Diagnostic Output Level (Broken VSS) | BVSSPD | 4 | %VDD | Broken VSS; Pull-down load RL ≤ 10 kΩ | 10 | ||
| Sampling Rate | 600 | 1000 | μs | Slow mode | 12 | ||
| Sampling Rate | 200 | 330 | μs | Fast mode | 12 | ||
| Analog Output Slew Rate | 200 | V/ms | COUT = 42 nF | 12 | |||
| Analog Output Slew Rate | 100 | V/ms | COUT = 100 nF | 12 | |||
| PWM Frequency | FPWM | 100 | 1000 | Hz | PWM Output Enabled | 12 | |
| Maximum Field Amplitude Change vs. Field Frequency (AGC 90%) | -10 | 10 | % | Slow mode, Field Freq > 40Hz | 13 | ||
| Maximum Field Amplitude Change vs. Field Frequency (AGC 90%) | -30 | 30 | % | Slow mode, Field Freq = 20Hz | 13 | ||
| Maximum Field Amplitude Change vs. Field Frequency (AGC 90%) | -12 | 12 | % | Fast mode, Field Freq > 150Hz | 13 | ||
| Maximum Field Amplitude Change vs. Field Frequency (AGC 64%) | -22 | 22 | % | Slow mode, Field Freq > 80Hz | 13 | ||
| Maximum Field Amplitude Change vs. Field Frequency (AGC 64%) | -30 | 30 | % | Slow mode, Field Freq = 50Hz | 13 | ||
| Maximum Field Amplitude Change vs. Field Frequency (AGC 64%) | -60 | 60 | % | Fast mode, Field Freq = 50Hz | 13 | ||
| Offset on the Raw Signals X, Y and Z | X0, Y0, Z0 | -60 | 60 | LSB15 | TA = 25 Deg.C | 13 | |
| Mismatch on the Raw Signals X and Y | SMISMXY | -1 | 1 | % | TA = 25 Deg.C, Between X and Y | 13 | |
| Mismatch on the Raw Signals X and Z | SMISMXZ | -30 | 30 | % | TA = 25 Deg.C, Between X and Z | 13 | |
| Mismatch on the Raw Signals Y and Z | SMISMYZ | -30 | 30 | % | TA = 25 Deg.C, Between Y and Z | 13 | |
| Magnetic Angle Phase Error Between X and Y | ORTHXY | -0.3 | 0.3 | Deg. | TA = 25 Deg.C | 14 | |
| Magnetic Angle Phase Error Between X and Z | ORTHXZ | -10 | 10 | Deg. | TA = 25 Deg.C | 14 | |
| Magnetic Angle Phase Error Between Y and Z | ORTHYZ | -10 | 10 | Deg. | TA = 25 Deg.C | 14 | |
| Thermal Offset Drift #1 on the Raw Signals X, Y and Z (Thermal Offset Drift at the DSP input) | -90 | 90 | LSB15 | Temperature suffix L | 14 | ||
| Thermal Offset Drift #2 of the DAC and Output Stage | -0.4 | 0.4 | %VDD | Temperature suffix L | 14 | ||
| Thermal Drift of Sensitivity Mismatch XY | ΔSMISMXY | -0.5 | 0.5 | % | Temperature suffix L | 14 | |
| Thermal Drift of Sensitivity Mismatch XZ | ΔSMISMXZ | -1.5 | 1.5 | % | Temperature suffix L | 14 | |
| Thermal Drift of Sensitivity Mismatch YZ | ΔSMISMYZ | -1.5 | 1.5 | % | Temperature suffix L | 14 | |
| Analog Output INL (12 bits DAC) | INL | -4 | 4 | %VDD | 12 bits DAC (Theoretical, Noise free) | 14 | |
| Magnetic Flux Density BX, BY | BX, BY | 20 | 50 | 70 | mT | 15 | |
| Magnetic Flux Density BZ | BZ | 24 | 140 | mT | 15 | ||
| IMC Gain in X and Y | GainIMCXY | 1.2 | 1.4 | 1.8 | 15 | ||
| Magnet Temperature Coefficient | TCm | -2400 | 0 | ppm/Deg.C | 15 |
CAD (KiCad official)
- Symbol:
MLX90333LDC-BCT-000-RE - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
mlx90333ldc-bct-000-re-etched.step/mlx90333ldc-bct-000-re-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);mlx90333ldc-bct-000-re.step/mlx90333ldc-bct-000-re.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Melexis(比利时迈来芯) datasheet (48 pp, sha256
cfb81ac4a1b5d0c5, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# MLX90333LDC-BCT-000-RE
**Melexis(比利时迈来芯)** · 3D Magnetic Sensors · SOIC-8
MLX90333LDC-BCT-000-RE from Melexis(比利时迈来芯), in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VDD | power_in | Supply pin; the absolute maximum supply overvoltage is +20 V and the reverse voltage protection is -10 V. |
| 2 | Test 0 | passive | Test pin that is recommended to be connected to ground for optimal EMC behaviour. |
| 3 | Not Used /SS | input | Not used in Analog/PWM mode and used as /SS (Slave Select) in Serial Protocol mode; the pinout table gives no electrical limits for it. |
| 4 | OUT2 / SCLK | output | OUT2 is the second ratiometric analog or PWM output in Analog/PWM mode, with absolute limits of +10 V (+14 V for 200 µs max at 25 °C), output current ±30 mA, reverse output voltage -0.3 V and reverse output current -50 mA; it is SCLK in Serial Protocol mode. |
| 5 | OUT1 / MOSI/MISO | bidirectional | OUT1 is the first ratiometric analog or PWM output in Analog/PWM mode, with absolute limits of +10 V (+14 V for 200 µs max at 25 °C), output current ±30 mA, reverse output voltage -0.3 V and reverse output current -50 mA; it is MOSI/MISO in Serial Protocol mode. |
| 6 | Test 1 | passive | Test pin that is recommended to be connected to ground for optimal EMC behaviour. |
| 7 | VDIG | power_in | Pinout lists this as the digital supply pin; the extracted pages give no electrical limits for it. |
| 8 | VSS | power_in | Ground reference (GND) for the device. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Melexis(比利时迈来芯) |
| Package | SOIC-8 |
| Category | Magnetic Sensors |
| Pins | 8 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply Voltage, VDD (overvoltage) | VDD | | | 20 | V | | 9 |
| Reverse Voltage Protection | | -10 | | | V | | 9 |
| Positive Output Voltage (Analog or PWM), Both Outputs OUT1 and OUT2 | | | | 10 | V | | 9 |
| Positive Output Voltage (Analog or PWM), Both Outputs OUT1 and OUT2 | | | | 14 | V | 200 s max, TA = + 25 Deg.C | 9 |
| Output Current (IOUT) | IOUT | -30 | | 30 | mA | | 9 |
| Reverse Output Voltage, Both Outputs OUT1 and OUT2 | | -0.3 | | | V | | 9 |
| Reverse Output Current, Both Outputs OUT1 and OUT2 | | -50 | | | mA | | 9 |
| Operating Ambient Temperature Range | TA | -40 | | 150 | Deg.C | | 9 |
| Storage Temperature Range | TS | -40 | | 150 | Deg.C | | 9 |
| Magnetic Flux Density | | -4 | | 4 | T | | 9 |
| Nominal Supply Voltage | VDD | 4.5 | 5 | 5.5 | V | | 10 |
| Supply Current (slow mode) | IDD | 8.5 | | 11 | mA | Slow mode | 10 |
| Supply Current (fast mode) | IDD | 13.5 | | 16 | mA | Fast mode | 10 |
| POR Supply Under Voltage | VDD | 2 | 2.7 | 3 | V | POR Supply Under Voltage | 10 |
| Output Current, Both Outputs OUT1 and OUT2 (Analog Output mode) | IOUT | -8 | | 8 | mA | Analog Output mode | 10 |
| Output Current, Both Outputs OUT1 and OUT2 (PWM Output mode) | IOUT | -20 | | 20 | mA | PWM Output mode | 10 |
| Output Short Circuit Current, Both Outputs OUT1 and OUT2 | Ishort | 12 | | 15 | mA | VOUT = 0 V | 10 |
| Output Short Circuit Current, Both Outputs OUT1 and OUT2 | Ishort | 24 | | 45 | mA | VOUT = 14 V (TA = 25 Deg.C) | 10 |
| Output Load, Both Outputs OUT1 and OUT2 | RL | 1 | | 10 | kΩ | Pull-down to Ground | 10 |
| Output Load, Both Outputs OUT1 and OUT2 | RL | 1 | | | kΩ | Pull-up to 5V (4); max printed as ∞ (5) | 10 |
| Analog Saturation Output Level, Low (Vsat_lo) | Vsat_lo | | | 3 | %VDD | Pull-up load RL ≥ 10 kΩ | 10 |
| Analog Saturation Output Level, High (Vsat_hi) | Vsat_hi | 96 | | | %VDD | Pull-down load RL ≥ 5 kΩ | 10 |
| Digital Saturation Output Level, Low (VsatD_lo) | VsatD_lo | | | 1.5 | %VDD | Pull-up Low Side RL ≥ 10 kΩ, Push-Pull (IOUT = -20mA) | 10 |
| Digital Saturation Output Level, High (VsatD_hi) | VsatD_hi | 97 | | | %VDD | Push-Pull (IOUT = 20mA) | 10 |
| Active Diagnostic Output Level, Low (Diag_lo) | Diag_lo | | | 1 | %VDD | Pull-down load RL ≥ 5 kΩ | 10 |
| Active Diagnostic Output Level, Low (Diag_lo) | Diag_lo | | | 1.5 | %VDD | Pull-up load RL ≥ 10 kΩ | 10 |
| Active Diagnostic Output Level, High (Diag_hi) | Diag_hi | 96 | | | %VDD | Pull-down load RL ≥ 5 kΩ | 10 |
| Active Diagnostic Output Level, High (Diag_hi) | Diag_hi | 98 | | | %VDD | Pull-up load RL ≥ 5 kΩ | 10 |
| Passive Diagnostic Output Level (Broken VSS) | BVSSPD | | | 4 | %VDD | Broken VSS; Pull-down load RL ≤ 10 kΩ | 10 |
| Sampling Rate | | 600 | | 1000 | μs | Slow mode | 12 |
| Sampling Rate | | 200 | | 330 | μs | Fast mode | 12 |
| Analog Output Slew Rate | | 200 | | | V/ms | COUT = 42 nF | 12 |
| Analog Output Slew Rate | | 100 | | | V/ms | COUT = 100 nF | 12 |
| PWM Frequency | FPWM | 100 | | 1000 | Hz | PWM Output Enabled | 12 |
| Maximum Field Amplitude Change vs. Field Frequency (AGC 90%) | | -10 | | 10 | % | Slow mode, Field Freq > 40Hz | 13 |
| Maximum Field Amplitude Change vs. Field Frequency (AGC 90%) | | -30 | | 30 | % | Slow mode, Field Freq = 20Hz | 13 |
| Maximum Field Amplitude Change vs. Field Frequency (AGC 90%) | | -12 | | 12 | % | Fast mode, Field Freq > 150Hz | 13 |
| Maximum Field Amplitude Change vs. Field Frequency (AGC 64%) | | -22 | | 22 | % | Slow mode, Field Freq > 80Hz | 13 |
| Maximum Field Amplitude Change vs. Field Frequency (AGC 64%) | | -30 | | 30 | % | Slow mode, Field Freq = 50Hz | 13 |
| Maximum Field Amplitude Change vs. Field Frequency (AGC 64%) | | -60 | | 60 | % | Fast mode, Field Freq = 50Hz | 13 |
| Offset on the Raw Signals X, Y and Z | X0, Y0, Z0 | -60 | | 60 | LSB15 | TA = 25 Deg.C | 13 |
| Mismatch on the Raw Signals X and Y | SMISMXY | -1 | | 1 | % | TA = 25 Deg.C, Between X and Y | 13 |
| Mismatch on the Raw Signals X and Z | SMISMXZ | -30 | | 30 | % | TA = 25 Deg.C, Between X and Z | 13 |
| Mismatch on the Raw Signals Y and Z | SMISMYZ | -30 | | 30 | % | TA = 25 Deg.C, Between Y and Z | 13 |
| Magnetic Angle Phase Error Between X and Y | ORTHXY | -0.3 | | 0.3 | Deg. | TA = 25 Deg.C | 14 |
| Magnetic Angle Phase Error Between X and Z | ORTHXZ | -10 | | 10 | Deg. | TA = 25 Deg.C | 14 |
| Magnetic Angle Phase Error Between Y and Z | ORTHYZ | -10 | | 10 | Deg. | TA = 25 Deg.C | 14 |
| Thermal Offset Drift #1 on the Raw Signals X, Y and Z (Thermal Offset Drift at the DSP input) | | -90 | | 90 | LSB15 | Temperature suffix L | 14 |
| Thermal Offset Drift #2 of the DAC and Output Stage | | -0.4 | | 0.4 | %VDD | Temperature suffix L | 14 |
| Thermal Drift of Sensitivity Mismatch XY | ΔSMISMXY | -0.5 | | 0.5 | % | Temperature suffix L | 14 |
| Thermal Drift of Sensitivity Mismatch XZ | ΔSMISMXZ | -1.5 | | 1.5 | % | Temperature suffix L | 14 |
| Thermal Drift of Sensitivity Mismatch YZ | ΔSMISMYZ | -1.5 | | 1.5 | % | Temperature suffix L | 14 |
| Analog Output INL (12 bits DAC) | INL | -4 | | 4 | %VDD | 12 bits DAC (Theoretical, Noise free) | 14 |
| Magnetic Flux Density BX, BY | BX, BY | 20 | 50 | 70 | mT | | 15 |
| Magnetic Flux Density BZ | BZ | 24 | | 140 | mT | | 15 |
| IMC Gain in X and Y | GainIMCXY | 1.2 | 1.4 | 1.8 | | | 15 |
| Magnet Temperature Coefficient | TCm | -2400 | | 0 | ppm/Deg.C | | 15 |
## CAD (KiCad official)
- Symbol: `MLX90333LDC-BCT-000-RE`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files: `mlx90333ldc-bct-000-re-etched.step` / `mlx90333ldc-bct-000-re-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `mlx90333ldc-bct-000-re.step` / `mlx90333ldc-bct-000-re.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Melexis(比利时迈来芯) datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8603117517355433984) (48 pp, sha256 `cfb81ac4a1b5d0c5`, retrieved 2026-10-18, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/mlx90333ldc-bct-000-re-datasheet.pdf)