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MLX90333EDC-BCT-000-RE

Melexis · Linear Hall Sensors · SOIC-8

MLX90333EDC-BCT-000-RE from Melexis, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VDD power_in Supply pin (VDD) for the analog/PWM configuration, with an absolute maximum overvoltage of +20 V and reverse voltage protection of -10 V.
2 Test 0 passive Test pin (serial-mode name also Test 0) that is recommended to be connected to ground for optimal EMC behavior.
3 Not Used unconnected Not used in analog/PWM mode (it is /SS, slave select, in serial protocol mode) and recommended to be connected to ground for optimal EMC behavior.
4 OUT2 output Output 2 in analog/PWM mode (SCLK in serial protocol mode), limited to +10 V (+14 V for 200 µs max at 25 °C), ±30 mA output current, -0.3 V reverse output voltage and -50 mA reverse output current.
5 OUT1 output Output 1 in analog/PWM mode (MOSI/MISO in serial protocol mode), limited to +10 V (+14 V for 200 µs max at 25 °C), ±30 mA output current, -0.3 V reverse output voltage and -50 mA reverse output current.
6 Test 1 passive Test pin (serial-mode name also Test 1) that is recommended to be connected to ground for optimal EMC behavior.
7 VDIG power_in Digital supply pin (VDIG) as printed in the pinout; its voltage limits and function are not detailed in the pages provided.
8 VSS power_in Ground pin (VSS) of the device, also the ground reference for the outputs.

Key specifications

Parameter Value
Manufacturer Melexis
Package SOIC-8
Category Magnetic Sensors
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply Voltage VDD (overvoltage) VDD 20 V 9
Reverse Voltage Protection -10 V 9
Positive Output Voltage (Analog or PWM) 10 V Both Outputs OUT1 and OUT2 9
Positive Output Voltage (Analog or PWM) 14 V 200 s max, TA = + 25 Deg.C 9
Output Current (IOUT) IOUT -30 30 mA 9
Operating Ambient Temperature Range TA -40 150 Deg.C 9
Storage Temperature Range TS -40 150 Deg.C 9
Operating temperature range, temperature suffix E TA -40 85 Deg.C Temperature suffix E 6
Nominal Supply Voltage VDD 4.5 5 5.5 V 10
Supply Current (per silicon die) IDD 11 mA Slow mode 10
Supply Current (per silicon die) IDD 16 mA Fast mode 10
POR Supply Under Voltage VDD 2 2.7 3 V POR Supply Under Voltage 10
Output Current, Analog Output mode IOUT -8 8 mA Analog Output mode 10
Output Current, PWM Output mode IOUT -20 20 mA PWM Output mode 10
Output Short Circuit Current Ishort 12 15 mA VOUT = 0 V 10
Output Short Circuit Current Ishort 24 45 mA VOUT = 14 V (TA = 25 Deg.C) 10
Output Load, pull-down to ground RL 1 kΩ Pull-down to Ground 10
Output Load, pull-up to 5V RL 10 kΩ Pull-up to 5V 10
Analog Saturation Output Level, low Vsat_lo 3 %VDD Pull-up load RL ≥ 10 kΩ 10
Analog Saturation Output Level, high Vsat_hi 96 %VDD Pull-down load RL ≥ 5 kΩ 10
Digital Saturation Output Level, low VsatD_lo 1.5 %VDD Pull-up Low Side RL ≥ 10 kΩ; Push-Pull (IOUT = -20mA) 10
Digital Saturation Output Level, high VsatD_hi 97 %VDD Push-Pull (IOUT = 20mA) 10
Active Diagnostic Output Level, low Diag_lo 1 %VDD Pull-down load RL ≥ 5 kΩ 10
Active Diagnostic Output Level, low Diag_lo 1.5 %VDD Pull-up load RL ≥ 10 kΩ 10
Active Diagnostic Output Level, high Diag_hi 96 %VDD Pull-down load RL ≥ 5 kΩ 10
Active Diagnostic Output Level, high Diag_hi 98 %VDD Pull-up load RL ≥ 5 kΩ 10
Passive Diagnostic Output Level (broken VSS) BVSSPD 4 %VDD Broken VSS; pull-down load RL ≤ 10 kΩ 10
Sampling Rate, slow mode 600 1000 μs Slow mode 12
Sampling Rate, fast mode 200 330 μs Fast mode 12
PWM Frequency FPWM 100 1000 Hz PWM Output Enabled 12
Maximum field amplitude change vs field frequency (AGC 90%) -10 10 % Slow mode; Field Freq > 40Hz 13
Maximum field amplitude change vs field frequency (AGC 90%) -30 30 % Slow mode; Field Freq = 20Hz 13
Maximum field amplitude change vs field frequency (AGC 90%) -12 12 % Fast mode; Field Freq > 150Hz 13
Maximum field amplitude change vs field frequency (AGC 64%) -22 22 % Slow mode; Field Freq > 80Hz 13
Maximum field amplitude change vs field frequency (AGC 64%) -30 30 % Slow mode; Field Freq = 50Hz 13
Maximum field amplitude change vs field frequency (AGC 64%) -60 60 % Fast mode; Field Freq = 50Hz 13
Offset on the Raw Signals X, Y and Z X0, Y0, Z0 -60 60 LSB15 TA = 25 Deg.C 13
Mismatch on the Raw Signals, X and Y SMISMXY -1 1 % TA = 25 Deg.C; Between X and Y 13
Mismatch on the Raw Signals, X and Z SMISMXZ -30 30 % TA = 25 Deg.C; Between X and Z 13
Mismatch on the Raw Signals, Y and Z SMISMYZ -30 30 % TA = 25 Deg.C; Between Y and Z 13
Magnetic Angle Phase Error, X and Y ORTHXY -0.3 0.3 Deg. TA = 25 Deg.C; Between X and Y 14
Magnetic Angle Phase Error, X and Z ORTHXZ -10 10 Deg. TA = 25 Deg.C; Between X and Z 14
Magnetic Angle Phase Error, Y and Z ORTHYZ -10 10 Deg. TA = 25 Deg.C; Between Y and Z 14
Thermal Offset Drift #1 at the DSP input (excl. DAC and output stage) -60 60 LSB15 Temperature suffix S, E and K 14
Thermal Offset Drift #2 of the DAC and output stage -0.3 0.3 %VDD Temperature suffix S, E and K 14
Thermal Drift of Sensitivity Mismatch, XY ΔSMISMXY -0.3 0.3 % Temperature suffix S, E and K 14
Thermal Drift of Sensitivity Mismatch, XZ ΔSMISMXZ -1 1 % Temperature suffix S, E and K 14
Thermal Drift of Sensitivity Mismatch, YZ ΔSMISMYZ -1 1 % Temperature suffix S, E and K 14
Analog Output INL INL -4 4 LSB 14
Analog Output DNL DNL -1 1 LSB 14
Output stage noise pk-pk 5 10 LSB15 Gain = 14, Slow mode, Filter = 5 14
Ratiometry Error -0.1 0 0.1 %VDD 14
Magnetic Flux Density BX, BY BX, BY 20 50 70 mT 15
Magnetic Flux Density BZ BZ 24 140 mT 15
IMC Gain in X and Y GainIMCXY 1.2 1.4 1.8 15
IMC Gain in Z GainIMCZ 1.1 1.3 15
k factor (GainIMCXY / GainIMCZ) k 1 1.2 1.5 15
Magnet Temperature Coefficient TCm -2400 0 ppm/Deg.C 15

CAD (KiCad official)

  • Symbol: MLX90333EDC-BCT-000-RE
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: mlx90333edc-bct-000-re-etched.step / mlx90333edc-bct-000-re-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); mlx90333edc-bct-000-re.step / mlx90333edc-bct-000-re.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Melexis datasheet (48 pp, sha256 cfb81ac4a1b5d0c5, retrieved 2026-10-19, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF