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ML51FB9AE

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Nuvoton Tech Microcontrollers (MCU/MPU/SOC), TSSOP-20. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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Symbol & Footprint

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Datasheet

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Contents

README

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ML51FB9AE

Nuvoton Tech · Microcontrollers (MCU/MPU/SOC) · TSSOP-20

ML51FB9AE from Nuvoton Tech, in a TSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VSS power_in Ground pin for the device; the datasheet requires all VSS pins to be connected to the external supply ground.
2 P4.6 / PWM0_CH0 / T0 / CLKO / INT0 bidirectional General-purpose I/O port P4.6, multiplexed with PWM0_CH0, T0, CLKO and INT0; after reset all GPIO pins are in input mode and are configured through the PxMx registers.
3 VDD power_in Positive supply pin; the datasheet gives an operating voltage of 1.8 V to 5.5 V and recommends VDD and AVDD be supplied from the same source.
4 P3.2 / ADC_CH7 / ACMP1_N1 / SPI1_CLK / IC1 / CLKO bidirectional General-purpose I/O port P3.2, multiplexed with ADC input channel 7, comparator 1 negative input 1, SPI1 clock, input capture channel 1 and CLKO; after reset it is in input mode.
5 P3.1 / ADC_CH6 / ACMP0_P3 / ACMP1_P3 / SPI1_MISO / UART0_TXD / IC2 bidirectional General-purpose I/O port P3.1, multiplexed with ADC input channel 6, comparator positive inputs, SPI1 MISO, UART0 TXD and input capture channel 2; after reset it is in input mode.
6 P3.0 / SPI1_MOSI / UART0_RXD / IC0 bidirectional General-purpose I/O port P3.0, multiplexed with SPI1 MOSI, UART0 RXD and input capture channel 0; after reset it is in input mode.
7 VREF power_in External reference voltage pin for the ADC/analog circuitry as shown in the block diagram; the datasheet gives no further electrical limits for this pin.
8 P2.5 / ADC_CH0 / I2C0_SCL / PWM0_CH0 / UART2_TXD / T0 / INT0 bidirectional General-purpose I/O port P2.5, multiplexed with ADC input channel 0, I2C0 clock, PWM0 channel 0, UART2 TXD, T0 and INT0; after reset it is in input mode.
9 P2.4 / ADC_CH1 / I2C0_SDA / PWM0_CH1 / UART2_RXD / T1 / INT1 bidirectional General-purpose I/O port P2.4, multiplexed with ADC input channel 1, I2C0 data, PWM0 channel 1, UART2 RXD, T1 and INT1; after reset it is in input mode.
10 P2.3 / ADC_CH2 / I2C1_SCL / UART1_TXD / PWM0_CH2 / PWM0_BRAKE bidirectional General-purpose I/O port P2.3, multiplexed with ADC input channel 2, I2C1 clock, UART1 TXD, PWM0 channel 2 and PWM0 brake input; after reset it is in input mode.
11 P2.2 / ADC_CH3 / I2C1_SDA / UART1_RXD / PWM0_CH3 bidirectional General-purpose I/O port P2.2, multiplexed with ADC input channel 3, I2C1 data, UART1 RXD and PWM0 channel 3; after reset it is in input mode.
12 P5.3 / UART0_TXD / I2C0_SCL / XT1_IN bidirectional General-purpose I/O port P5.3, multiplexed with UART0 TXD, I2C0 clock and the XT1_IN external 4-24 MHz crystal input; after reset it is in input mode.
13 P5.2 / UART0_RXD / I2C0_SDA / XT1_OUT bidirectional General-purpose I/O port P5.2, multiplexed with UART0 RXD, I2C0 data and the XT1_OUT external 4-24 MHz crystal output; after reset it is in input mode.
14 P0.3 / SPI1_SS / UART1_TXD / I2C1_SCL / STADC / PWM0_CH2 bidirectional General-purpose I/O port P0.3, multiplexed with SPI1 slave select, UART1 TXD, I2C1 clock, the ADC external trigger STADC and PWM0 channel 2; after reset it is in input mode.
15 P0.2 / SPI1_CLK / UART1_RXD / I2C1_SDA / PWM0_CH3 bidirectional General-purpose I/O port P0.2, multiplexed with SPI1 clock, UART1 RXD, I2C1 data and PWM0 channel 3; after reset it is in input mode.
16 P0.1 / SPI1_MISO / UART0_TXD / PWM0_CH4 bidirectional General-purpose I/O port P0.1, multiplexed with SPI1 MISO, UART0 TXD and PWM0 channel 4; after reset it is in input mode.
17 P0.0 / SPI1_MOSI / UART0_RXD / PWM0_CH5 bidirectional General-purpose I/O port P0.0, multiplexed with SPI1 MOSI, UART0 RXD and PWM0 channel 5; after reset it is in input mode.
18 nRESET input Active-low external reset input with an internal pull-up resistor; driving it low places the MCU in the reset state.
19 P5.0 / UART1_TXD / I2C1_SCL / UART0_TXD / ICE_DAT bidirectional General-purpose I/O port P5.0, multiplexed with UART1 TXD, I2C1 clock, UART0 TXD and the ICE_DAT serial debug data pin; after reset it is in input mode.
20 P5.1 / UART1_RXD / I2C1_SDA / UART0_RXD / ICE_CLK bidirectional General-purpose I/O port P5.1, multiplexed with UART1 RXD, I2C1 data, UART0 RXD and the ICE_CLK serial debug clock pin; after reset it is in input mode.

Key specifications

Parameter Value
Manufacturer Nuvoton Tech
Package TSSOP-20
Category Embedded Processors & Controllers
Pins 20

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Operating temperature TA -40 105 ℃ 47
Operating voltage VDD 1.8 5.5 V 47
DC supply voltage VDD-VSS VDD-VSS -0.3 5.5 V 69
Variation between different VDD pins ΔVDD 50 mV 69
Allowed difference VDD to AVDD /VDD-AVDD/ 50 mV 69
Variation between different VSS pins ΔVSS 50 mV 69
Allowed difference VSS to AVSS /VSS - AVSS/ 50 mV 69
I/O input voltage (5 V tolerant) VIN 5.5 V 69
Maximum VSS output current ΣISS 100 mA 70
Maximum sink current, single pin IIO 20 mA 70
Maximum source current, single pin IIO 20 mA 70
Maximum sum of sink currents, all pins IIO 100 mA 70
Maximum sum of output currents, all pins IIO 100 mA 70
nRESET internal pull-up resistance RRST 45 60 KΩ VDD = 5.5 V 55
nRESET internal pull-up resistance RRST 50 65 KΩ VDD = 1.8 V 55
nRESET input filter pulse time, power-down mode tFR 10 25 µs 掉电模式 (power-down mode) 55
24 MHz HIRC output frequency fHRC 23.76 24 24.24 MHz 56
24 MHz HIRC frequency accuracy -1 1 % TA = 25 °C, VDD = 5V 56
24 MHz HIRC frequency accuracy -2 2 % TA = 25 °C, VDD = 3.3V 56
24 MHz HIRC frequency accuracy -5 5 % TA = -20°C ~ +105 °C, VDD = 1.8 ~ 5.5V 56
24 MHz HIRC operating current IHRC 490 550 µA 56
24 MHz HIRC stabilization time TS 3 5 µs TA = -40°C ~ +105 °C, VDD = 1.8 ~ 5.5V 56
38.4 kHz LIRC frequency accuracy -2 2 % TA = 25 °C, VDD = 5V 57
38.4 kHz LIRC frequency accuracy -15 15 % TA=-40105°C, VDD=1.8V5.5V, Without software calibration 57
38.4 kHz LIRC operating current ILRC 0.85 1 µA VDD = 3.3V 57
Flash LDO supply (VFLA) VFLA 1.35 1.5 1.65 V TA = 25℃ 68
Flash endurance (program/erase cycles) NENDUR 100000 cycles TJ = -40℃~125℃ 68
Flash data retention TRET 50 year 100 kcycle, TA = 55℃ 68
Flash data retention TRET 25 year 100 kcycle, TA = 85℃ 68
Flash data retention TRET 10 year 100 kcycle, TA = 105℃ 68
External analog reference voltage (upper limit AVDD) VREF 1.8 V 67
External analog reference voltage, VRFSEL[2:0] = 001 VREF 2.018 2.048 2.078 V TA = 25°C 67
External analog reference voltage, VRFSEL[2:0] = 011 VREF 3.042 3.072 3.102 V TA = 25°C 67
Band-gap voltage VBG 0.793 0.814 0.835 V TA = -40°C ~105 °C 67
Normal run, 24 MHz (HIRC), peripherals disabled IDD_RUN 2.4 2.9 mA 正常运行模式，运行在 Flash，所有外设禁用; max at TA = 105 °C; VDD = AVDD = 3.3 V 48
Normal run, 24 MHz (HXT), peripherals disabled IDD_RUN 2.52 3.16 mA 正常运行模式，运行在 Flash，所有外设禁用; max at TA = 105 °C; VDD = AVDD = 3.3 V 48
Normal run, 12 MHz (HXT), peripherals disabled IDD_RUN 1.56 2.2 mA 正常运行模式，运行在 Flash，所有外设禁用; max at TA = 105 °C; VDD = AVDD = 3.3 V 48
Normal run, 4 MHz (HXT), peripherals disabled IDD_RUN 0.91 1.43 mA 正常运行模式，运行在 Flash，所有外设禁用; max at TA = 105 °C; VDD = AVDD = 3.3 V 48
Normal run, 38.4 kHz (LIRC), peripherals disabled IDD_RUN 0.22 0.35 mA 正常运行模式，运行在 Flash，所有外设禁用; max at TA = 105 °C; VDD = AVDD = 3.3 V 48
Normal run, 32.768 kHz (LXT), peripherals disabled IDD_RUN 0.24 0.35 mA 正常运行模式，运行在 Flash，所有外设禁用; max at TA = 105 °C; VDD = AVDD = 3.3 V 48
Normal run, 24 MHz (HIRC), all peripherals enabled IDD_RUN 3.5 3.89 mA 正常运行模式，运行在 Flash，所有外设使能; max at TA = 105 °C; VDD = AVDD = 3.3 V 48
Normal run, 24 MHz (HXT), all peripherals enabled IDD_RUN 3.62 4.31 mA 正常运行模式，运行在 Flash，所有外设使能; max at TA = 105 °C; VDD = AVDD = 3.3 V 48
Normal run, 12 MHz (HXT), all peripherals enabled IDD_RUN 2.26 2.92 mA 正常运行模式，运行在 Flash，所有外设使能; max at TA = 105 °C; VDD = AVDD = 3.3 V 48
Normal run, 4 MHz (HXT), all peripherals enabled IDD_RUN 1.3 1.83 mA 正常运行模式，运行在 Flash，所有外设使能; max at TA = 105 °C; VDD = AVDD = 3.3 V 48
Normal run, 38.4 kHz (LIRC), all peripherals enabled IDD_RUN 0.37 0.61 mA 正常运行模式，运行在 Flash，所有外设使能; max at TA = 105 °C; VDD = AVDD = 3.3 V 48
Normal run, 32.768 kHz (LXT), all peripherals enabled IDD_RUN 0.4 0.62 mA 正常运行模式，运行在 Flash，所有外设使能; max at TA = 105 °C; VDD = AVDD = 3.3 V 48
Low-power run, 38.4 kHz (LIRC), peripherals disabled IDD_LPRUN 15 66 µA 低功耗运行模式，运行在 Flash，所有外设禁用; max at TA = 105 °C; VDD = AVDD = 3.3 V 49
Low-power run, 32.768 kHz (LXT), peripherals disabled IDD_LPRUN 19 67 µA 低功耗运行模式，运行在 Flash，所有外设禁用; max at TA = 105 °C; VDD = AVDD = 3.3 V 49
Low-power run, 38.4 kHz (LIRC), all peripherals enabled IDD_LPRUN 193 344 µA 低功耗运行模式，运行在 Flash，所有外设使能; max at TA = 105 °C; VDD = AVDD = 3.3 V 49
Low-power run, 32.768 kHz (LXT), all peripherals enabled IDD_LPRUN 194 345 µA 低功耗运行模式，运行在 Flash，所有外设使能; max at TA = 105 °C 49
Idle, 24 MHz (HIRC), peripherals disabled IDD_IDLE 1.43 1.64 mA 空闲模式，所有外设禁用; max at TA = 105 °C 49
Idle, 24 MHz (HXT), peripherals disabled IDD_IDLE 1.52 2.05 mA 空闲模式，所有外设禁用; max at TA = 105 °C 49
Idle, 24 MHz (HIRC), all peripherals enabled IDD_IDLE 2.46 2.8 mA 空闲模式，所有外设使能; max at TA = 105 °C 49
Idle, 24 MHz (HXT), all peripherals enabled IDD_IDLE 2.55 3.19 mA 空闲模式，所有外设使能; max at TA = 105 °C 49

CAD (KiCad official)

  • Symbol: ML51FB9AE
  • Footprint: Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm
  • 3D model: TSSOP-20 (KiCad packages3D, STEP)
  • 3D model files: ml51fb9ae-etched.step / ml51fb9ae-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ml51fb9ae.step / ml51fb9ae.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Nuvoton Tech datasheet (85 pp, sha256 8232f8f756941f1b, retrieved 2026-10-19, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF