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MIC706SMY
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Microchip Tech Monitors & Reset Circuits, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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MIC706SMY
Microchip Tech · Monitors & Reset Circuits · SOIC-8
MIC706SMY from Microchip Tech, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | /MR | input | Manual reset input forces reset outputs to assert when pulled below 0.8V, with an internal 250µA pull-up that holds it high when floating and TTL/CMOS drivable. |
| 2 | VCC | power_in | Primary supply input, operating up to 5.5V (3.00V to 5.5V for MIC706S) with absolute maximum of 6.0V. |
| 3 | GND | power_in | IC ground pin, 0V reference. |
| 4 | PFI | input | Power-fail comparator input referenced to 1.25V, which should be connected to GND or VOUT if the comparator is not used. |
| 5 | /PFO | output | Power-fail output, independent of all other functions, that remains high while PFI is above 1.25V. |
| 6 | WDI | input | Watchdog input that forces /WDO low if held high or low longer than the 1.6s timeout period, and the watchdog is disabled by floating the pin. |
| 7 | /RESET | output | Active-low reset output asserted when VCC drops below the 2.93V threshold or /MR goes low, and held for 200ms after VCC recovers or /MR goes high. |
| 8 | /WDO | output | Watchdog timer output forced low when WDI is stuck longer than the timeout period or VCC is below the reset threshold, remaining low until VCC returns to a valid level. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | SOIC-8 |
| Category | Power Supply Chip |
| Pins | 8 |
CAD (KiCad official)
- Symbol:
MIC706SMY - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
mic706smy-etched.step/mic706smy-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);mic706smy.step/mic706smy.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Microchip Tech datasheet (10 pp, sha256
065bd533d7b64da1, retrieved 2026-10-23, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# MIC706SMY
**Microchip Tech** · Monitors & Reset Circuits · SOIC-8
MIC706SMY from Microchip Tech, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | /MR | input | Manual reset input forces reset outputs to assert when pulled below 0.8V, with an internal 250µA pull-up that holds it high when floating and TTL/CMOS drivable. |
| 2 | VCC | power_in | Primary supply input, operating up to 5.5V (3.00V to 5.5V for MIC706S) with absolute maximum of 6.0V. |
| 3 | GND | power_in | IC ground pin, 0V reference. |
| 4 | PFI | input | Power-fail comparator input referenced to 1.25V, which should be connected to GND or VOUT if the comparator is not used. |
| 5 | /PFO | output | Power-fail output, independent of all other functions, that remains high while PFI is above 1.25V. |
| 6 | WDI | input | Watchdog input that forces /WDO low if held high or low longer than the 1.6s timeout period, and the watchdog is disabled by floating the pin. |
| 7 | /RESET | output | Active-low reset output asserted when VCC drops below the 2.93V threshold or /MR goes low, and held for 200ms after VCC recovers or /MR goes high. |
| 8 | /WDO | output | Watchdog timer output forced low when WDI is stuck longer than the timeout period or VCC is below the reset threshold, remaining low until VCC returns to a valid level. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | SOIC-8 |
| Category | Power Supply Chip |
| Pins | 8 |
## CAD (KiCad official)
- Symbol: `MIC706SMY`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files: `mic706smy-etched.step` / `mic706smy-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `mic706smy.step` / `mic706smy.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Microchip Tech datasheet](docs/mic706smy-datasheet.pdf) (10 pp, sha256 `065bd533d7b64da1`, retrieved 2026-10-23, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/mic706smy-datasheet.pdf)