# MIC69303YME-TR

**Microchip Tech** · Linear Voltage Regulators (LDO) · SOIC-8-EP

MIC69303YME-TR from Microchip Tech, in a SOIC-8-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GND | power_in | Ground. |
| 2 | EN | input | Enable input, CMOS compatible: logic high enables the regulator, logic low shuts it down, and the pin must not be left floating. |
| 3 | IN | power_in | Input voltage (1.65V to 5.5V) that supplies current to the output power device; pins 3 and 4 are both IN. |
| 4 | IN | power_in | Input voltage (1.65V to 5.5V) that supplies current to the output power device; pins 3 and 4 are both IN. |
| 5 | OUT | power_out | Regulator output; pins 5 and 6 are both OUT. |
| 6 | OUT | power_out | Regulator output; pins 5 and 6 are both OUT. |
| 7 | ADJ | input | Adjustable regulator feedback input (0.5V reference) that connects to a resistor voltage divider, with the resistor from OUT to ADJ not exceeding 10kΩ. |
| 8 | FLG | output | Error flag, open collector output that is active low to indicate an output fault condition. |
| 9 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | SOIC-8-EP |
| Category | Power Management ICs |
| Pins | 9 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply Input Voltage | VIN | -0.3 |  | 6 | V | VIN to GND | 4 |
| Fault Flag Voltage | VFLG | -0.3 |  | 6 | V | VFLG to GND | 4 |
| Storage Temperature | TS | -65 |  | 125 | °C |  | 4 |
| Lead Temperature | TS |  |  | 260 | °C |  | 4 |
| ESD |  |  |  | 2 | kV |  | 4 |
| Supply Voltage | VIN | 1.65 |  | 5.5 | V | Operating ratings | 4 |
| Enable Input Voltage | VEN | 0 |  | 5.5 | V | 0V to VIN | 4 |
| Junction Temperature | TJ | -40 |  | 125 | °C |  | 4 |
| Input Voltage Range | VIN | 1.65 |  | 5.5 | V |  | 4 |
| Ground Pin Current | IGND |  | 1.2 | 5 | mA | IOUT = 10mA | 4 |
| Ground Pin Current | IGND |  | 12 | 30 | mA | IOUT = 1.5A | 4 |
| Ground Pin Current | IGND |  | 32 | 75 | mA | IOUT = 3.0A | 4 |
| Ground Pin Current in Shutdown |  |  |  | 1 | µA | VEN = 0V; VIN = 2.0V; VOUT = 0V | 4 |
| Load Regulation |  |  | 0.3 |  | % | IOUT = 10mA to 3A (printed ±0.3) | 4 |
| Line Regulation |  |  | 0.2 | 0.3 | %/V | VIN = VOUT + 1.0V to 5.5V | 4 |
| Feedback Reference Voltage (ADJ Pin) | VREF | 0.49 | 0.5 | 0.51 | V | +/- 2.0% | 4 |
| Feedback Bias Current |  |  | 0.25 | 1 | µA | VADJ = 0.5V | 4 |
| Current Limit | ILIM | 3.3 |  | 5.2 | A | VOUT = 0V | 4 |
| Dropout Voltage | VIN - VOUT |  | 200 | 300 | mV | IOUT = 1.5A | 4 |
| Dropout Voltage | VIN - VOUT |  | 275 | 500 | mV | IOUT = 3.0A | 4 |
| Enable Input Threshold, Regulator Enabled | VEN |  | 0.57 | 0.8 | V | Regulator Enabled | 4 |
| Enable Input Threshold, Regulator Shutdown | VEN | 0.2 |  |  | V | Regulator Shutdown | 4 |
| Enable Pin Bias Current |  |  | 0 |  | µA | VEN ≤ 0.2V (Regulator Shutdown) | 4 |
| Enable Pin Bias Current |  |  |  | 7 | µA | VEN ≥ 0.8V (Regulator Enabled) | 4 |
| Turn-on Time |  |  | 10 | 150 | µs | 90% of typical VOUT; VEN = VIN | 4 |
| Fault Threshold Voltage (VOUT Falling) |  | 7.5 | 10 | 14 | % | % of VOUT below nominal output | 4 |
| Fault Hysteresis |  |  | 2 |  | % |  | 4 |
| Fault Output Low Voltage |  |  |  | 150 | mV | IFLG = 250μA (sinking), VEN = 0V | 4 |
| Fault Leakage Current |  |  | 0.05 |  | μA | VFLG = 5.0V; VEN = 0V | 5 |
| Over-Temperature Shutdown |  |  | 165 |  | °C | TJ Rising | 5 |
| Over-Temperature Shutdown Hysteresis |  |  | 10 |  | °C |  | 5 |

## CAD (KiCad official)

- Symbol: `MIC69303YME-TR`
- Footprint: `Package_SO:SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.29x3mm`
- 3D model: SOIC-8-EP (KiCad packages3D, STEP)
- 3D model files: `mic69303yme-tr-etched.step` / `mic69303yme-tr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `mic69303yme-tr.step` / `mic69303yme-tr.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Microchip Tech datasheet](docs/mic69303yme-tr-datasheet.pdf) (13 pp, sha256 `a373a66ee7aa956b`, retrieved 2026-10-23, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/mic69303yme-tr-datasheet.pdf)