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MIC6315-29D2UY-TR
Public Made by Adomby adom
Microchip Tech Supervisor And Reset ICs, SOT-143-4. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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MIC6315-29D2UY-TR
Microchip Tech · Supervisor And Reset ICs · SOT-143-4
MIC6315-29D2UY-TR from Microchip Tech, in a SOT-143-4. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GND | power_in | IC ground. |
| 2 | /RESET | output | Active-low reset output that goes low if VCC falls below the reset threshold and stays asserted for one reset timeout period after VCC exceeds the reset threshold. |
| 3 | /MR | input | Manual reset input where a logic LOW forces a reset that stays asserted while held LOW and for one reset timeout period after /MR goes HIGH; it can be shorted to ground by a switch or driven by TTL or CMOS logic, and should float if unused. |
| 4 | VCC | power_in | Power supply input. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | SOT-143-4 |
| Category | Power Management (PMIC) |
| Pins | 4 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Operating Voltage Range | VCC | 1 | 5.5 | V | 3 | ||
| Supply Current | ICC | 5 | 15 | µA | VCC = 5.5V, no load | 3 | |
| Supply Current | ICC | 5 | 10 | µA | VCC = 3.6V, no load | 3 | |
| Reset Voltage Threshold tolerance | VTH | -2.5 | 2.5 | % | VTH, 2.5% to VTH + 2.5%, Note 1 | 3 | |
| Reset Timeout Period (D2U, 20 ms min variant) | tRST | 20 | 28 | 44 | ms | D2U row | 3 |
| /RESET Output Voltage | VOL | 0.4 | V | VCC ≥ 4.0V, ISNK = 3.2 mA | 3 | ||
| /RESET Output Voltage | VOL | 0.3 | V | VCC ≥ 2.5V, ISNK = 1.2 mA | 3 | ||
| /RESET Output Leakage | 1 | µA | /RESET deasserted | 3 | |||
| /MR Minimum Pulse Width | 10 | µs | 3 | ||||
| /MR-to-Reset Delay | 0.5 | µs | 3 | ||||
| /MR Pull-Up Resistance | 10 | 20 | 30 | kΩ | 4 | ||
| /MR Glitch Immunity | 100 | ns | 4 | ||||
| Junction Temperature Range | TJ | -40 | 125 | °C | Note 1 | 4 | |
| Operating Temperature Range | TA | -40 | 85 | °C | 4 | ||
| Storage Temperature Range | TS | -65 | 150 | °C | 4 | ||
| Lead Temperature | 300 | °C | Soldering, 10 sec. | 4 | |||
| Terminal Voltage (VCC, /RESET) | -0.3 | 6 | V | 3 | |||
| Terminal Voltage (/MR) | -0.3 | V | Max printed as (VCC + 0.3V) | 3 | |||
| Rate of Rise (VCC) | 100 | V/µs | 3 | ||||
| Input Current (VCC, /MR) | 20 | mA | 3 | ||||
| Output Current (/RESET) | 20 | mA | 3 | ||||
| ESD Rating | 3 | kV | Human body model, 1.5 kΩ in series with 100 pF | 3 | |||
| Input Voltage (/RESET) | 5.5 | V | Printed as GND to +5.5V | 3 | |||
| Power Dissipation | 320 | mW | TA = +70°C | 3 | |||
| Reset Voltage Threshold (nominal, MIC6315-29D2UY) | VTH | 2.93 | V | Nominal VTH from marking/ordering table, Note 1 | 8 |
CAD (KiCad official)
- Symbol:
MIC6315-29D2UY-TR - Footprint:
Package_TO_SOT_SMD:SOT-143 - 3D model: SOT-143-4 (KiCad packages3D, STEP)
- 3D model files:
mic6315-29d2uy-tr-etched.step/mic6315-29d2uy-tr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);mic6315-29d2uy-tr.step/mic6315-29d2uy-tr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Microchip Tech datasheet (16 pp, sha256
4fbfdf9bf321e18b, retrieved 2026-10-20, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# MIC6315-29D2UY-TR
**Microchip Tech** · Supervisor And Reset ICs · SOT-143-4
MIC6315-29D2UY-TR from Microchip Tech, in a SOT-143-4. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GND | power_in | IC ground. |
| 2 | /RESET | output | Active-low reset output that goes low if VCC falls below the reset threshold and stays asserted for one reset timeout period after VCC exceeds the reset threshold. |
| 3 | /MR | input | Manual reset input where a logic LOW forces a reset that stays asserted while held LOW and for one reset timeout period after /MR goes HIGH; it can be shorted to ground by a switch or driven by TTL or CMOS logic, and should float if unused. |
| 4 | VCC | power_in | Power supply input. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | SOT-143-4 |
| Category | Power Management (PMIC) |
| Pins | 4 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Operating Voltage Range | VCC | 1 | | 5.5 | V | | 3 |
| Supply Current | ICC | | 5 | 15 | µA | VCC = 5.5V, no load | 3 |
| Supply Current | ICC | | 5 | 10 | µA | VCC = 3.6V, no load | 3 |
| Reset Voltage Threshold tolerance | VTH | -2.5 | | 2.5 | % | VTH, 2.5% to VTH + 2.5%, Note 1 | 3 |
| Reset Timeout Period (D2U, 20 ms min variant) | tRST | 20 | 28 | 44 | ms | D2U row | 3 |
| /RESET Output Voltage | VOL | | | 0.4 | V | VCC ≥ 4.0V, ISNK = 3.2 mA | 3 |
| /RESET Output Voltage | VOL | | | 0.3 | V | VCC ≥ 2.5V, ISNK = 1.2 mA | 3 |
| /RESET Output Leakage | | | | 1 | µA | /RESET deasserted | 3 |
| /MR Minimum Pulse Width | | 10 | | | µs | | 3 |
| /MR-to-Reset Delay | | | | 0.5 | µs | | 3 |
| /MR Pull-Up Resistance | | 10 | 20 | 30 | kΩ | | 4 |
| /MR Glitch Immunity | | | | 100 | ns | | 4 |
| Junction Temperature Range | TJ | -40 | | 125 | °C | Note 1 | 4 |
| Operating Temperature Range | TA | -40 | | 85 | °C | | 4 |
| Storage Temperature Range | TS | -65 | | 150 | °C | | 4 |
| Lead Temperature | | | | 300 | °C | Soldering, 10 sec. | 4 |
| Terminal Voltage (VCC, /RESET) | | -0.3 | | 6 | V | | 3 |
| Terminal Voltage (/MR) | | -0.3 | | | V | Max printed as (VCC + 0.3V) | 3 |
| Rate of Rise (VCC) | | | | 100 | V/µs | | 3 |
| Input Current (VCC, /MR) | | | | 20 | mA | | 3 |
| Output Current (/RESET) | | | | 20 | mA | | 3 |
| ESD Rating | | | | 3 | kV | Human body model, 1.5 kΩ in series with 100 pF | 3 |
| Input Voltage (/RESET) | | | | 5.5 | V | Printed as GND to +5.5V | 3 |
| Power Dissipation | | | | 320 | mW | TA = +70°C | 3 |
| Reset Voltage Threshold (nominal, MIC6315-29D2UY) | VTH | | 2.93 | | V | Nominal VTH from marking/ordering table, Note 1 | 8 |
## CAD (KiCad official)
- Symbol: `MIC6315-29D2UY-TR`
- Footprint: `Package_TO_SOT_SMD:SOT-143`
- 3D model: SOT-143-4 (KiCad packages3D, STEP)
- 3D model files: `mic6315-29d2uy-tr-etched.step` / `mic6315-29d2uy-tr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `mic6315-29d2uy-tr.step` / `mic6315-29d2uy-tr.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Microchip Tech datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590912133075464192) (16 pp, sha256 `4fbfdf9bf321e18b`, retrieved 2026-10-20, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/mic6315-29d2uy-tr-datasheet.pdf)