component
MIC5800YM-TR
Public Made by Adomby adom
Microchip Tech Latches, SOIC-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
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MIC5800YM-TR
Microchip Tech · Latches · SOIC-14
MIC5800YM-TR from Microchip Tech, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | CLEAR | input | A high CLEAR input resets all latches and turns all outputs OFF (open) regardless of data or STROBE levels. |
| 2 | STROBE | input | Input strobe pin that loads the output latches with the input data when high. |
| 3 | IN1 | input | Parallel data input 1, CMOS/PMOS/NMOS compatible with internal pull-down resistor (VIN(1) min 3.5V at VDD = 5V). |
| 4 | IN2 | input | Parallel data input 2, CMOS/PMOS/NMOS compatible with internal pull-down resistor (VIN(1) min 3.5V at VDD = 5V). |
| 5 | IN3 | input | Parallel data input 3, CMOS/PMOS/NMOS compatible with internal pull-down resistor (VIN(1) min 3.5V at VDD = 5V). |
| 6 | IN4 | input | Parallel data input 4, CMOS/PMOS/NMOS compatible with internal pull-down resistor (VIN(1) min 3.5V at VDD = 5V). |
| 7 | GND | power_in | Logic and output ground pin. |
| 8 | COM | passive | Transient suppression diode common cathode pin, connected to the load supply for inductive load clamping. |
| 9 | OUT4 | output | Open-collector Darlington sink output 4, sinks up to 500 mA and withstands at least 50V in the OFF state. |
| 10 | OUT3 | output | Open-collector Darlington sink output 3, sinks up to 500 mA and withstands at least 50V in the OFF state. |
| 11 | OUT2 | output | Open-collector Darlington sink output 2, sinks up to 500 mA and withstands at least 50V in the OFF state. |
| 12 | OUT1 | output | Open-collector Darlington sink output 1, sinks up to 500 mA and withstands at least 50V in the OFF state. |
| 13 | VDD | power_in | Logic supply voltage, absolute maximum +15V. |
| 14 | /OE | input | Output enable: outputs are active when low, inactive when high (also resets the device from a fault condition), and an undervoltage condition emulates a high input. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | SOIC-14 |
| Category | Logic ICs |
| Pins | 14 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Output Leakage Current | ICEX | 50 | µA | VCE = 50V, TA = +25°C | 3 | ||
| Output Leakage Current | ICEX | 100 | µA | VCE = 50V, TA = +70°C | 3 | ||
| Collector-Emitter Saturation Voltage | VCE(SAT) | 0.9 | 1.1 | V | IC = 100 mA | 3 | |
| Collector-Emitter Saturation Voltage | VCE(SAT) | 1.1 | 1.3 | V | IC = 200 mA | 3 | |
| Collector-Emitter Saturation Voltage | VCE(SAT) | 1.3 | 1.6 | V | IC = 350 mA, VDD = 7.0V | 3 | |
| Input Voltage (Low) | VIN(0) | 1 | V | 3 | |||
| Input Voltage (High) | VIN(1) | 10.5 | V | VDD = 12V | 3 | ||
| Input Voltage (High) | VIN(1) | 8.5 | V | VDD = 10V | 3 | ||
| Input Voltage (High) | VIN(1) | 3.5 | V | VDD = 5V, Note 2 | 3 | ||
| Input Resistance | RIN | 50 | 200 | kΩ | VDD = 12V | 3 | |
| Input Resistance | RIN | 50 | 300 | kΩ | VDD = 10V | 3 | |
| Input Resistance | RIN | 50 | 600 | kΩ | VDD = 5V | 3 | |
| Supply Current ON (Each Stage) | IDD(ON) | 1 | 2 | mA | VDD = 12V, Outputs Open | 3 | |
| Supply Current ON (Each Stage) | IDD(ON) | 0.9 | 1.7 | mA | VDD = 10V, Outputs Open | 3 | |
| Supply Current ON (Each Stage) | IDD(ON) | 0.7 | 1 | mA | VDD = 5V, Outputs Open | 3 | |
| Supply Current OFF (Total) | IDD(OFF) | 200 | µA | VDD = 12V, Outputs Open, Inputs = 0V | 3 | ||
| Supply Current OFF (Total) | IDD(OFF) | 50 | 100 | µA | VDD = 5V, Outputs Open, Inputs = 0V | 3 | |
| Clamp Diode Leakage Current | IR | 50 | µA | VR = 50V, TA = +25°C | 4 | ||
| Clamp Diode Leakage Current | IR | 100 | µA | VR = 50V, TA = +70°C | 4 | ||
| Clamp Diode Forward Voltage | VF | 1.7 | 2 | V | IF = 350 mA | 4 | |
| Storage Temperature Range | TS | -65 | 125 | °C | 4 | ||
| Operating Temperature Range | TA | -40 | 85 | °C | 4 | ||
| Data setup time (A) | 50 | ns | Minimum data active time before strobe enabled; TA = +25°C, VDD = 5V | 6 | |||
| Data hold time (B) | 50 | ns | Minimum data active time after strobe disabled; TA = +25°C, VDD = 5V | 6 | |||
| Minimum strobe pulse width (C) | 125 | ns | TA = +25°C, VDD = 5V | 6 | |||
| Minimum clear pulse width (F) | 300 | ns | TA = +25°C, VDD = 5V | 6 | |||
| Minimum data pulse width (G) | 225 | ns | TA = +25°C, VDD = 5V | 6 | |||
| Strobe to output on-to-off transition (D) | 500 | ns | TA = +25°C, VDD = 5V | 6 | |||
| Strobe to output off-to-on transition (E) | 500 | ns | TA = +25°C, VDD = 5V | 6 | |||
| Output Voltage | VCE | 50 | V | 3 | |||
| Supply Voltage | VDD | 15 | V | 3 | |||
| Package Power Dissipation MIC5800 SOIC | PD | 1 | W | Derate above TA = +25°C at 8.5 mW/°C | 3 |
CAD (KiCad official)
- Symbol:
MIC5800YM-TR - Footprint:
Package_SO:SOIC-14_3.9x8.7mm_P1.27mm - 3D model: SOIC-14 (KiCad packages3D, STEP)
- 3D model files:
mic5800ym-tr-etched.step/mic5800ym-tr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);mic5800ym-tr.step/mic5800ym-tr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Microchip Tech datasheet (22 pp, sha256
c986352d9310eda7, retrieved 2026-10-31, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).