component
MIC5209YM-TR
Public Made by Adomby adom
Microchip Tech Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
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MIC5209YM-TR
Microchip Tech · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOIC-8
MIC5209YM-TR from Microchip Tech, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | EN | input | Enable input is a CMOS-compatible control: logic-high (above 2V) enables the regulator and logic-low (0.4V max, 0.18V for full shutdown spec) shuts it down, and EN should be tied to IN if the enable feature is not used. |
| 2 | IN | power_in | Supply input, specified from +2.5V to +16V with an absolute maximum of -20V to +20V, and a 1 µF capacitor from IN to GND is recommended when the input is battery-fed or more than 10 inches from the AC filter capacitor. |
| 3 | OUT | power_out | Regulator output that requires an output capacitor from OUT to GND to prevent oscillation, with 1 µF minimum when BYP/ADJ capacitor is not used and 2.2 µF minimum when a 470 pF capacitor is used. |
| 4 | ADJ | input | Adjust feedback input, a high-impedance node connected to an external resistive divider to set VOUT (adjustable range +1.8V to +15V), with R2 recommended not to exceed 470 kΩ, and an optional 470 pF capacitor to GND for low noise. |
| 5 | GND | power_in | Ground; SOIC-8 pins 5 through 8 are internally connected to each other and to the regulator ground. |
| 6 | GND | power_in | Ground; SOIC-8 pins 5 through 8 are internally connected to each other and to the regulator ground. |
| 7 | GND | power_in | Ground; SOIC-8 pins 5 through 8 are internally connected to each other and to the regulator ground. |
| 8 | GND | power_in | Ground; SOIC-8 pins 5 through 8 are internally connected to each other and to the regulator ground. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | SOIC-8 |
| Category | Power Management (PMIC) |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Output Voltage Accuracy | VOUT | -1 | 1 | % | VIN = VOUT + 1V; IL = 100 μA; TJ = +25°C | 5 | |
| Output Voltage Accuracy (over temperature) | VOUT | -2 | 2 | % | VIN = VOUT + 1V; IL = 100 μA; bold values, -40°C ≤ TJ ≤ +125°C | 5 | |
| Line Regulation | ΔVOUT/VOUT | 0.009 | 0.05 | % | VIN = VOUT + 1V to 16V | 5 | |
| Line Regulation (over temperature) | ΔVOUT/VOUT | 0.1 | % | VIN = VOUT + 1V to 16V; bold values, -40°C ≤ TJ ≤ +125°C | 5 | ||
| Load Regulation | ΔVOUT/VOUT | 0.05 | 0.5 | % | IL = 100 µA to 500 mA, Note 3 | 5 | |
| Load Regulation (over temperature) | ΔVOUT/VOUT | 0.7 | % | IL = 100 µA to 500 mA, Note 3; bold values, -40°C ≤ TJ ≤ +125°C | 5 | ||
| Dropout Voltage | VIN, VOUT | 10 | 60 | mV | IL = 100 µA | 5 | |
| Dropout Voltage (over temperature) | VIN, VOUT | 80 | mV | IL = 100 µA; bold values, -40°C ≤ TJ ≤ +125°C | 5 | ||
| Dropout Voltage | VIN, VOUT | 115 | 175 | mV | IL = 50 mA | 5 | |
| Dropout Voltage (over temperature) | VIN, VOUT | 250 | mV | IL = 50 mA; bold values, -40°C ≤ TJ ≤ +125°C | 5 | ||
| Dropout Voltage | VIN, VOUT | 165 | 300 | mV | IL = 150 mA | 5 | |
| Dropout Voltage (over temperature) | VIN, VOUT | 400 | mV | IL = 150 mA; bold values, -40°C ≤ TJ ≤ +125°C | 5 | ||
| Dropout Voltage | VIN, VOUT | 350 | 500 | mV | IL = 500 mA | 5 | |
| Dropout Voltage (over temperature) | VIN, VOUT | 600 | mV | IL = 500 mA; bold values, -40°C ≤ TJ ≤ +125°C | 5 | ||
| Ground Pin Current | IGND | 80 | 130 | µA | VEN ≥ 3.0V, IOUT = 100 µA | 5 | |
| Ground Pin Current (over temperature) | IGND | 170 | µA | VEN ≥ 3.0V, IOUT = 100 µA; bold values, -40°C ≤ TJ ≤ +125°C | 5 | ||
| Ground Pin Current | IGND | 350 | 650 | µA | VEN ≥ 3.0V, IOUT = 50 mA | 5 | |
| Ground Pin Current (over temperature) | IGND | 900 | µA | VEN ≥ 3.0V, IOUT = 50 mA; bold values, -40°C ≤ TJ ≤ +125°C | 5 | ||
| Ground Pin Current | IGND | 1.8 | 2.5 | mA | VEN ≥ 3.0V, IOUT = 150 mA | 5 | |
| Ground Pin Current (over temperature) | IGND | 3 | mA | VEN ≥ 3.0V, IOUT = 150 mA; bold values, -40°C ≤ TJ ≤ +125°C | 5 | ||
| Ground Pin Current | IGND | 8 | 20 | mA | VEN ≥ 3.0V, IOUT = 500 mA | 5 | |
| Ground Pin Current (over temperature) | IGND | 25 | mA | VEN ≥ 3.0V, IOUT = 500 mA; bold values, -40°C ≤ TJ ≤ +125°C | 5 | ||
| Ground Pin Quiescent Current | IGND | 0.05 | 3 | µA | VEN ≤ 0.4V (shutdown) | 5 | |
| Ground Pin Quiescent Current | IGND | 0.1 | 8 | µA | VEN ≤ 0.18V (shutdown) | 5 | |
| Current Limit | ILIMIT | 700 | 900 | mA | VOUT = 0V | 5 | |
| Current Limit (over temperature) | ILIMIT | 1000 | mA | VOUT = 0V; bold values, -40°C ≤ TJ ≤ +125°C | 5 | ||
| Enable Input Logic-Low Voltage | VENL | 0.4 | V | VEN = Logic-low (Regulator shutdown) | 6 | ||
| Enable Input Logic-Low Voltage (over temperature) | VENL | 0.18 | V | VEN = Logic-low (Regulator shutdown); bold values, -40°C ≤ TJ ≤ +125°C | 6 | ||
| Enable Input Logic-High Voltage | VENH | 2 | V | VEN = Logic-high (Regulator enabled) | 6 | ||
| Enable Input Current | IENL | 0.01 | -1 | µA | VENL ≤ 0.4V | 6 | |
| Enable Input Current (over temperature) | IENL | -2 | µA | VENL ≤ 0.18V; bold values, -40°C ≤ TJ ≤ +125°C | 6 | ||
| Enable Input Current | IENH | 5 | 20 | µA | VENH ≥ 2.0V | 6 | |
| Enable Input Current (over temperature) | IENH | 25 | µA | VENH ≥ 2.0V; bold values, -40°C ≤ TJ ≤ +125°C | 6 | ||
| Enable Input Current | IENH | 30 | µA | VENH ≥ 16V | 6 | ||
| Enable Input Current (over temperature) | IENH | 50 | µA | VENH ≥ 16V; bold values, -40°C ≤ TJ ≤ +125°C | 6 | ||
| Supply Voltage | VIN | -20 | 20 | V | 4 | ||
| ESD Rating (DFN, SOIC-8) HBM | 5 | kV | Human body model, DFN and SOIC-8 packages | 4 | |||
| ESD Rating (DFN, SOIC-8) MM | 100 | V | Machine model, DFN and SOIC-8 packages | 4 | |||
| Storage Temperature Range | TS | -65 | 150 | °C | 7 | ||
| Lead Temperature | 260 | °C | Soldering, 5 sec. | 7 | |||
| Supply Voltage | VIN | 2.5 | 16 | V | 4 | ||
| Adjustable Output Voltage Range | VOUT | 1.8 | 15 | V | 4 | ||
| Junction Temperature | TJ | -40 | 125 | °C | 2.5V ≤ VOUT ≤ 15V | 7 | |
| Junction Temperature | TJ | 0 | 125 | °C | 1.8V ≤ VOUT < 2.5V | 7 | |
| Thermal Resistance, Junction-to-Ambient (SOIC-8) | θJA | 50 | °C/W | See Thermal Considerations for more information | 7 | ||
| Thermal Resistance, Junction-to-Case (SOIC-8) | θJC | 25 | °C/W | 7 |
CAD (KiCad official)
- Symbol:
MIC5209YM-TR - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
mic5209ym-tr-etched.step/mic5209ym-tr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);mic5209ym-tr.step/mic5209ym-tr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Microchip Tech datasheet (30 pp, sha256
46148b9c0d4d1f14, retrieved 2026-10-19, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).