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MIC5209-5.0YU

Microchip Tech · Linear Voltage Regulators (LDO) · TO-263-5

MIC5209-5.0YU from Microchip Tech, in a TO-263-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 EN input Enable input, CMOS-compatible: logic-high (>2.0V) enables the regulator, logic-low (≤0.4V) shuts it down; connect to IN if not used.
2 IN power_in Supply input, operating range +2.5V to +16V (absolute maximum -20V to +20V).
3 GND power_in Ground pin, internally connected to the TAB.
4 OUT power_out Regulated 5.0V output (fixed version) requiring an output capacitor (1 µF minimum without CBYP, 2.2 µF minimum with 470 pF CBYP) to GND for stability.
5 BYP passive Reference bypass for fixed-voltage versions: connect an external 470 pF capacitor to GND to reduce output noise, or leave open.
6 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Microchip Tech
Package TO-263-5
Category Power Management
Pins 6

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Output Voltage Accuracy (25°C) VOUT -1 1 % Variation from nominal VOUT; VIN = VOUT+1V, IL=100 µA, TJ=25°C 5
Output Voltage Accuracy (full temp) VOUT -2 2 % Variation from nominal VOUT; -40°C ≤ TJ ≤ +125°C 5
Line Regulation (25°C) ΔVOUT/VOUT 0.009 0.05 % VIN = VOUT + 1V to 16V 5
Line Regulation (full temp) ΔVOUT/VOUT 0.1 % VIN = VOUT + 1V to 16V 5
Load Regulation (25°C) ΔVOUT/VOUT 0.05 0.5 % IL = 100 µA to 500 mA, Note 3 5
Load Regulation (full temp) ΔVOUT/VOUT 0.7 % IL = 100 µA to 500 mA, Note 3 5
Dropout Voltage (25°C) VIN, VOUT 10 60 mV IL = 100 µA 5
Dropout Voltage (full temp) VIN, VOUT 80 mV IL = 100 µA 5
Dropout Voltage (25°C) VIN, VOUT 115 175 mV IL = 50 mA 5
Dropout Voltage (full temp) VIN, VOUT 250 mV IL = 50 mA 5
Dropout Voltage (25°C) VIN, VOUT 165 300 mV IL = 150 mA 5
Dropout Voltage (full temp) VIN, VOUT 400 mV IL = 150 mA 5
Dropout Voltage (25°C) VIN, VOUT 350 500 mV IL = 500 mA 5
Dropout Voltage (full temp) VIN, VOUT 600 mV IL = 500 mA 5
Ground Pin Current (25°C) IGND 80 130 µA VEN ≥ 3.0V, IOUT = 100 µA 5
Ground Pin Current (full temp) IGND 170 µA VEN ≥ 3.0V, IOUT = 100 µA 5
Ground Pin Current (25°C) IGND 350 650 µA VEN ≥ 3.0V, IOUT = 50 mA 5
Ground Pin Current (full temp) IGND 900 µA VEN ≥ 3.0V, IOUT = 50 mA 5
Ground Pin Current (25°C) IGND 1.8 2.5 mA VEN ≥ 3.0V, IOUT = 150 mA 5
Ground Pin Current (full temp) IGND 3 mA VEN ≥ 3.0V, IOUT = 150 mA 5
Ground Pin Current (25°C) IGND 8 20 mA VEN ≥ 3.0V, IOUT = 500 mA 5
Ground Pin Current (full temp) IGND 25 mA VEN ≥ 3.0V, IOUT = 500 mA 5
Ground Pin Quiescent Current (shutdown) IGND 0.05 3 µA VEN ≤ 0.4V (shutdown) 5
Ground Pin Quiescent Current (shutdown) IGND 0.1 8 µA VEN ≤ 0.18V (shutdown) 5
Current Limit (25°C) ILIMIT 700 900 mA VOUT = 0V 5
Current Limit (full temp) ILIMIT 1000 mA VOUT = 0V 5
Enable Input Logic-Low Voltage VENL 0.4 V VEN = Logic-low (Regulator shutdown) 6
Enable Input Logic-Low Voltage VENL 0.18 V VEN = Logic-low (Regulator shutdown) 6
Enable Input Logic-High Voltage VENH 2 V VEN = Logic-high (Regulator enabled) 6
Enable Input Current Low IENL 0.01 -1 µA VENL ≤ 0.4V 6
Enable Input Current Low IENL 0.01 -2 µA VENL ≤ 0.18V 6
Enable Input Current High (25°C) IENH 5 20 µA VENH ≥ 2.0V 6
Enable Input Current High (full temp) IENH 25 µA VENH ≥ 2.0V 6
Enable Input Current High IENH 30 µA VENH ≥ 16V 6
Enable Input Current High (full temp) IENH 50 µA VENH ≥ 16V 6
Supply Voltage (absolute maximum) VIN -20 20 V 4
Supply Voltage (operating) VIN 2.5 16 V 4
Storage Temperature Range TS -65 150 °C 7
Lead Temperature 260 °C Soldering, 5 sec. 7
Junction Temperature TJ -40 125 °C 2.5V ≤ VOUT ≤ 15V 7
Output Voltage Temperature Coefficient ΔVOUT/ΔT 40 ppm/°C Note 2 5
Ripple Rejection PSRR 75 dB f = 120 Hz 5
Thermal Regulation ΔVOUT/ΔPD 0.05 %/W Note 7 5
Output Noise en 500 nV/√Hz VOUT = 2.5V, IOUT = 50 mA, COUT = 2.2 µF, CBYP = 0 5
Output Noise en 300 nV/√Hz IOUT = 50 mA, COUT = 2.2 µF, CBYP = 470 pF 5
Thermal Resistance Junction-to-Ambient DDPAK θJA 31.4 °C/W EIA/JEDEC JES51-751-7, 4 Layer Board 7
Thermal Resistance Junction-to-Case DDPAK θJC 3 °C/W EIA/JEDEC JES51-751-7, 4 Layer Board 7

CAD (KiCad official)

  • Symbol: MIC5209-5.0YU
  • Footprint: Package_TO_SOT_SMD:TO-263-5_TabPin6
  • 3D model: TO-263-5 (KiCad packages3D, STEP)
  • 3D model files: mic5209-5-0yu-etched.step / mic5209-5-0yu-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); mic5209-5-0yu.step / mic5209-5-0yu.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Microchip Tech datasheet (30 pp, sha256 46148b9c0d4d1f14, retrieved 2026-10-27, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF