component
MIC4606-2YTS-TR
Public Made by Adomby adom
Microchip Tech Pre-ordered MCUs, TSSOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
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MIC4606-2YTS-TR
Microchip Tech · Pre-ordered MCUs · TSSOP-16
MIC4606-2YTS-TR from Microchip Tech, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | BHB | power_in | Phase B high-side bootstrap supply; connect an external bootstrap capacitor between this pin and BHS, with an on-chip bootstrap diode from VDD to BHB. |
| 2 | EN | input | Enable input; logic high gives normal operation, logic low disables all outputs and places the driver in Low-Current Shutdown mode, and the pin must not be left floating. |
| 3 | BPWM | input | Phase B PWM input for single input signal drive. |
| 4 | NC | unconnected | No connect. |
| 5 | NC | unconnected | No connect. |
| 6 | APWM | input | Phase A PWM input for single input signal drive. |
| 7 | NC | unconnected | No connect. |
| 8 | AHB | power_in | Phase A high-side bootstrap supply; connect an external bootstrap capacitor between this pin and AHS, with an on-chip bootstrap diode from VDD to AHB. |
| 9 | AHO | output | Phase A high-side drive output; connect to the external high-side power MOSFET gate. |
| 10 | AHS | passive | Phase A high-side drive reference connection; connect to the external high-side MOSFET source terminal and place a bootstrap capacitor between this pin and AHB. |
| 11 | ALO | output | Phase A low-side drive output; connect to the external low-side power MOSFET gate. |
| 12 | VDD | power_in | Input supply for gate drivers (5.5V to 16V operating); decouple this pin to VSS with a >1.0 µF capacitor. |
| 13 | VSS | power_in | Driver reference supply input; connect to the power ground of the external circuitry. |
| 14 | BLO | output | Phase B low-side drive output; connect to the external low-side power MOSFET gate. |
| 15 | BHS | passive | Phase B high-side drive reference connection; connect to the external high-side MOSFET source terminal and place a bootstrap capacitor between this pin and BHB. |
| 16 | BHO | output | Phase B high-side drive output; connect to the external high-side power MOSFET gate. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | TSSOP-16 |
| Category | Embedded Processors & Controllers |
| Pins | 16 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply Voltage (VDD, VxHB, VxHS) | VDD | -0.3 | 18 | V | 3 | ||
| Input Voltage (VxLI, VxHI, VEN) | -0.3 | V | -0.3V to VDD + 0.3V | 3 | |||
| Voltage on xHS (Continuous) | VxHS | -0.3 | 90 | V | 3 | ||
| Average Current in VDD to HB Diode | 100 | mA | 3 | ||||
| ESD HBM | -1 | 1 | kV | All pins, HBM | 3 | ||
| ESD MM | -200 | 200 | V | All pins, MM | 3 | ||
| Supply Voltage (VDD) decreasing | VDD | 5.25 | 16 | V | decreasing VDD | 3 | |
| Supply Voltage (VDD) increasing | VDD | 5.5 | 16 | V | increasing VDD | 3 | |
| Enable Voltage | VEN | 0 | V | 0V to VDD | 3 | ||
| Voltage on xHS | -0.3 | 85 | V | 3 | |||
| Voltage on xHS (repetitive transient < 1 µs) | -1 | 90 | V | repetitive transient < 1 µs | 3 | ||
| HS Slew Rate | 50 | V/ns | 3 | ||||
| VDD Quiescent Current | IDD | 200 | 350 | µA | xLI = xHI = 0V | 3 | |
| VDD Shutdown Current | IDDSH | 2.5 | 5 | µA | EN = 0V with xHS = floating | 3 | |
| VDD Shutdown Current | IDDSH | 40 | 100 | µA | EN = 0V, xLI, xHI = 12V or 0V | 3 | |
| VDD Operating Current | IDDO | 0.35 | 0.5 | mA | fS = 20 kHz | 3 | |
| Total xHB Quiescent Current | IHB | 35 | 75 | µA | xLI = xHI = 0V or xLI = 0V and xHI = 5V | 3 | |
| Total xHB Operating Current | IHBO | 30 | 400 | μA | fS = 20 kHz | 3 | |
| xHB to VSS Quiescent Current | IHBS | 0.5 | 5 | µA | VxHS = VxHB = 90V | 3 | |
| xHB to VSS Operating Current | IHBSO | 3 | 10 | µA | fS = 20 kHz | 3 | |
| Low-Level Input Voltage | VIL | 0.8 | V | 4 | |||
| High-Level Input Voltage | VIH | 2.2 | V | 4 | |||
| Input Voltage Hysteresis | VHYS | 0.1 | V | 4 | |||
| Input Pull-Down Resistance | RI | 50 | 150 | 250 | kΩ | xPWM inputs | 4 |
| VDD Falling Threshold | VDDR | 4 | 4.4 | 4.9 | V | 4 | |
| VDD Threshold Hysteresis | VDDH | 0.25 | V | 4 | |||
| xHB Falling Threshold | VHBR | 4 | 4.4 | 4.9 | V | 4 | |
| xHB Threshold Hysteresis | VHBH | 0.25 | V | 4 | |||
| Bootstrap Diode Low-Current Forward Voltage | VDL | 0.4 | 0.7 | V | IVDD-xHB = 100 µA | 4 | |
| Bootstrap Diode High-Current Forward Voltage | VDH | 0.7 | 1 | V | IVDD-xHB = 50 mA | 4 | |
| Bootstrap Diode Dynamic Resistance | RD | 3 | 5 | Ω | IVDD-xHB = 50 mA | 4 | |
| LO Low-Level Output Voltage | VOLL | 0.3 | 0.6 | V | IxLO = 50 mA | 4 | |
| LO High-Level Output Voltage | VOHL | 0.5 | 1 | V | IxLO = -50 mA, VOHL = VDD, VxLO | 4 | |
| LO Peak Sink Current | IOHL | 1 | A | VxLO = 0V | 4 | ||
| LO Peak Source Current | IOLL | 1 | A | VxLO = 12V | 4 | ||
| HO Low-Level Output Voltage | VOLH | 0.3 | 0.6 | V | IxHO = 50 mA | 4 | |
| HO High-Level Output Voltage | VOHH | 0.5 | 1 | V | IxHO = -50 mA, VOHH = VxHB, VxHO | 4 | |
| HO Peak Sink Current | IOHH | 1 | A | VxHO = 0V | 4 | ||
| HO Peak Source Current | IOLH | 1 | A | VxLO = 12V | 4 | ||
| Lower Turn-Off Propagation Delay | tLPHL | 35 | 75 | ns | 4 | ||
| Upper Turn-Off Propagation Delay | tHPHL | 35 | 75 | ns | 4 | ||
| Lower Turn-On Propagation Delay | tLPLH | 35 | 75 | ns | 4 | ||
| Upper Turn-On Propagation Delay | tHPLH | 35 | 75 | ns | 5 | ||
| Delay from xPWM High to xLO Low | tLOOFF | 35 | 75 | ns | 5 | ||
| Delay from xLO Off to xHO High | tHOON | 35 | 75 | ns | 5 | ||
| Delay from xPWM Low to xHO Low | tHOOFF | 35 | 75 | ns | 5 | ||
| Switch Node Voltage Threshold Signaling xHO is Off | VSWTH | 1 | 2.2 | 4 | V | 5 | |
| Delay Between xHO Off to xLO On | tLOON | 35 | 75 | ns | 5 | ||
| Delay from xPWM Low to xLO High (xHS Low/xLI High) | tLOONHI | 80 | 150 | ns | 5 | ||
| Force xLO On if VSWTH is Not Detected | tSWTO | 100 | 250 | 500 | ns | 5 | |
| Output Rise/Fall Time | tR/tF | 20 | ns | CL = 1000 pF | 5 | ||
| Output Rise/Fall Time (3V to 9V) | tR/tF | 0.8 | µs | CL = 0.1 µF | 5 | ||
| Minimum Input Pulse Width that Changes the Output | tPW | 50 | ns | 5 | |||
| xLO Output Voltage Threshold for Low-Side FET Off | VLOOFF | 1.9 | V | 5 | |||
| Storage Temperature Range | TS | -60 | 150 | °C | 6 | ||
| Junction Operating Temperature | TJ | -40 | 125 | °C | 6 | ||
| Thermal Resistance, 16-Lead TSSOP | θJA | 97.5 | °C/W | 6 |
CAD (KiCad official)
- Symbol:
MIC4606-2YTS-TR - Footprint:
Package_SO:TSSOP-16_4.4x5mm_P0.65mm - 3D model: TSSOP-16 (KiCad packages3D, STEP)
- 3D model files:
mic4606-2yts-tr-etched.step/mic4606-2yts-tr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);mic4606-2yts-tr.step/mic4606-2yts-tr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Microchip Tech datasheet (44 pp, sha256
d01f16733998d8e6, retrieved 2026-10-26, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).