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MIC4428YM
Public Made by Adomby adom
Microchip Tech Pre-ordered MCUs, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownMIC4428YM
Microchip Tech · Pre-ordered MCUs · SOIC-8
MIC4428YM from Microchip Tech, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | NC | unconnected | Not internally connected. |
| 2 | INA | input | Control Input A: TTL/CMOS compatible logic input, with logic-high recognized from about 1.5V up to VS, drawing less than 1 µA, and protected to -5V. |
| 3 | GND | power_in | Ground; use a ground plane or separate input and output ground returns for best switching speed. |
| 4 | INB | input | Control Input B: TTL/CMOS compatible logic input, with logic-high recognized from about 1.5V up to VS, drawing less than 1 µA, and protected to -5V. |
| 5 | OUTB | output | Output B: CMOS totem-pole output with 1.5A peak current, swinging within 25 mV of the supply or ground. |
| 6 | VS | power_in | Supply Input: +4.5V to +18V operating range (22V absolute maximum), to be bypassed with parallel low-inductance ceramic capacitors. |
| 7 | OUTA | output | Output A: CMOS totem-pole output with 1.5A peak current, swinging within 25 mV of the supply or ground. |
| 8 | NC | unconnected | Not internally connected. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | SOIC-8 |
| Category | Embedded Processors & Controllers |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Logic 1 Input Voltage | VIH | 2.4 | 1.4 | V | TA=+25°C, 4.5V≤VS≤18V | 3 | |
| Logic 1 Input Voltage (full temp range) | VIH | 2.4 | 1.5 | V | full specified temperature range | 3 | |
| Logic 0 Input Voltage | VIL | 1.1 | 0.8 | V | TA=+25°C | 3 | |
| Logic 0 Input Voltage (full temp range) | VIL | 1 | 0.8 | V | full specified temperature range | 3 | |
| Input Current | IIN | -1 | 1 | μA | 0V ≤ VIN ≤ VS | 3 | |
| High Output Voltage | VOH | -0.025 | V | printed as VS, 0.025 min (relative to VS) | 3 | ||
| Low Output Voltage | VOL | 0.025 | V | 3 | |||
| Output Resistance | RO | 6 | 10 | Ω | IOUT = 10 mA, VS = 18V, TA=+25°C | 3 | |
| Output Resistance (full temp range) | RO | 8 | 12 | Ω | IOUT = 10 mA, VS = 18V, full temperature range | 3 | |
| Latch-Up Protection | I | 500 | mA | Withstand Reverse Current (printed >500) | 3 | ||
| Rise Time | tr | 18 | 30 | ns | Test Figure 1-1, TA=+25°C | 3 | |
| Rise Time (full temp range) | tr | 20 | 40 | ns | Test Figure 1-1, full temperature range | 3 | |
| Fall Time | tf | 15 | 20 | ns | Test Figure 1-1, TA=+25°C | 3 | |
| Fall Time (full temp range) | tf | 29 | 40 | ns | Test Figure 1-1, full temperature range | 3 | |
| Delay Time | tD1 | 17 | 30 | ns | Test Figure 1-1, TA=+25°C | 3 | |
| Delay Time (full temp range) | tD1 | 19 | 40 | ns | Test Figure 1-1, full temperature range | 3 | |
| Delay Time | tD2 | 23 | 50 | ns | Test Figure 1-1, TA=+25°C | 3 | |
| Delay Time (full temp range) | tD2 | 27 | 60 | ns | Test Figure 1-1, full temperature range | 3 | |
| Pulse Width | tPW | 400 | ns | Test Figure 1-1 | 4 | ||
| Power Supply Current | IS | 0.6 | 1.4 | 4.5 | mA | VINA = VINB = 3.0V, TA=+25°C | 4 |
| Power Supply Current (full temp range) | IS | 1.5 | 8 | mA | VINA = VINB = 3.0V, full temperature range | 4 | |
| Power Supply Current | IS | 0.18 | 0.4 | mA | VINA = VINB = 0V, TA=+25°C | 4 | |
| Power Supply Current (full temp range) | IS | 0.19 | 0.6 | mA | VINA = VINB = 0V, full temperature range | 4 | |
| Supply Voltage | VS | 22 | V | 3 | |||
| Input Voltage | VIN | -5 | 0.3 | V | printed VS + 0.3V to GND, 5V | 3 | |
| Supply Voltage | VS | 4.5 | 18 | V | Operating Ratings | 3 | |
| Junction Operating Temperature Range | TJ | -40 | 85 | °C | Y option | 4 | |
| Maximum Junction Temperature | TJ | 150 | °C | 4 | |||
| Storage Temperature Range | TS | -65 | 150 | °C | 4 | ||
| Lead Temperature | 300 | °C | 10 sec. | 4 | |||
| Peak Output Current | IPK | 1.5 | A | 3 | |||
| Thermal Resistance, SOIC 8-Ld | θJA | 120 | °C/W | 4 | |||
| Thermal Resistance, SOIC 8-Ld | θJC | 75 | °C/W | 4 |
CAD (KiCad official)
- Symbol:
MIC4428YM - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
mic4428ym-etched.step/mic4428ym-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);mic4428ym.step/mic4428ym.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Microchip Tech datasheet (20 pp, sha256
2d840005217a3aea, retrieved 2026-10-22, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).