# MIC4427YM

**Microchip Tech** · Gate Drive ICs · SOIC-8

MIC4427YM from Microchip Tech, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | NC | unconnected | Not internally connected. |
| 2 | INA | input | Control Input A is a TTL/CMOS compatible logic input. |
| 3 | GND | power_in | Ground return for the driver. |
| 4 | INB | input | Control Input B is a TTL/CMOS compatible logic input. |
| 5 | OUTB | output | Output B is a CMOS totem-pole output. |
| 6 | VS | power_in | Supply input operating from +4.5V to +18V. |
| 7 | OUTA | output | Output A is a CMOS totem-pole output. |
| 8 | NC | unconnected | Not internally connected. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | SOIC-8 |
| Category | Power Management ICs |
| Pins | 8 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply Voltage | VS |  |  | 22 | V |  | 4 |
| Junction Temperature | TJ |  |  | 150 | °C |  | 4 |
| Storage Temperature |  | -65 |  | 150 | °C |  | 4 |
| Lead Temperature |  |  |  | 300 | °C | 10 sec. | 4 |
| Input Voltage | VIN | -5 |  |  | V | Lower limit GND, 5V; upper limit VS + 0.3V | 4 |
| Supply Voltage | VS | 4.5 |  | 18 | V |  | 4 |
| Temperature Range (B) | TA | -40 |  | 85 | °C | Grade (B) | 4 |
| Logic 1 Input Voltage | VIH | 2.4 |  |  | V | 4.5V ≤ Vs ≤ 18V | 4 |
| Logic 0 Input Voltage | VIL |  | 1.1 | 0.8 | V | 4.5V ≤ Vs ≤ 18V | 4 |
| Input Current | IIN | -1 |  | 1 | µA | 0 ≤ VIN ≤ VS | 4 |
| Low Output Voltage | VOL |  |  | 0.025 | V |  | 4 |
| Output Resistance | RO |  | 6 | 10 | Ω | IOUT = 10mA, VS = 18V | 4 |
| Output Resistance | RO |  | 8 | 12 | Ω |  | 4 |
| Peak Output Current | IPK |  | 1.5 |  | A |  | 4 |
| Latch-Up Protection withstand reverse current | IR | 500 |  |  | mA | withstand reverse current | 4 |
| Rise Time | tR |  | 18 | 30 | ns | test Figure 1 | 4 |
| Rise Time | tR |  | 20 | 40 | ns | test Figure 1 | 4 |
| Fall Time | tF |  | 15 | 20 | ns | test Figure 1 | 4 |
| Fall Time | tF |  | 29 | 40 | ns | test Figure 1 | 4 |
| Delay Time | tD1 |  | 17 | 30 | ns | test Figure 1 | 4 |
| Delay Time | tD1 |  | 19 | 40 | ns | test Figure 1 | 4 |
| Delay Time | tD2 |  | 23 | 50 | ns | test Figure 1 | 4 |
| Delay Time | tD2 |  | 27 | 60 | ns | test Figure 1 | 4 |
| Pulse Width | tPW | 400 |  |  | ns | test Figure 1 | 4 |
| Power Supply Current | IS | 0.6 | 1.4 | 4.5 | mA | VINA = VINB = 3.0V | 4 |
| Power Supply Current | IS |  | 1.5 | 8 | mA | VINA = VINB = 3.0V | 4 |
| Power Supply Current | IS |  | 0.18 | 0.4 | mA | VINA = VINB = 0.0V | 4 |
| Power Supply Current | IS |  | 0.19 | 0.6 | mA | VINA = VINB = 0.0V | 4 |

## CAD (KiCad official)

- Symbol: `MIC4427YM`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files: `mic4427ym-etched.step` / `mic4427ym-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `mic4427ym.step` / `mic4427ym.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Microchip Tech datasheet](docs/mic4427ym-datasheet.pdf) (9 pp, sha256 `4ee5141786e66a5d`, retrieved 2026-11-02, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/mic4427ym-datasheet.pdf)