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MIC4425YM
Public Made by Adomby adom
Microchip Tech Gate Drive ICs, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownMIC4425YM
Microchip Tech · Gate Drive ICs · SOIC-8
MIC4425YM from Microchip Tech, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | NC | unconnected | Not connected internally; the datasheet lists pin 1 as NC on the 8-pin SOIC. |
| 2 | INA | input | Control input for driver A, TTL-compatible with logic 1 at 2.4V minimum and logic 0 at 0.8V maximum, and it withstands swings to 5V below ground without latch-up. |
| 3 | GND | power_in | Ground return for both drivers; the datasheet absolute maximum input range is VS + 0.3V to GND - 5V, and the device tolerates up to 5V of ground-pin noise spiking. |
| 4 | INB | input | Control input for driver B, TTL-compatible with logic 1 at 2.4V minimum and logic 0 at 0.8V maximum, and it withstands swings to 5V below ground without latch-up. |
| 5 | OUTB | output | Output of driver B, rated for 3A peak output current, with the output swinging within 25mV of ground or VS. |
| 6 | VS | power_in | Supply input for the drivers, specified for 4.5V to 18V operation with an absolute maximum of 22V. |
| 7 | OUTA | output | Output of driver A, rated for 3A peak output current, with the output swinging within 25mV of ground or VS. |
| 8 | NC | unconnected | Not connected internally; the datasheet lists pin 8 as NC on the 8-pin SOIC. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | SOIC-8 |
| Category | Power Management ICs |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Logic 1 Input Voltage | VIH | 2.4 | V | 4.5V ≤ VS ≤ 18V | 3 | ||
| Logic 0 Input Voltage | VIL | 0.8 | V | 4.5V ≤ VS ≤ 18V | 3 | ||
| Input Current | IIN | -1 | 1 | µA | 0V ≤ VIN ≤ VS | 3 | |
| Input Current (bold, -40°C to +85°C) | IIN | -10 | 10 | µA | 3 | ||
| High Output Voltage | VOH | -0.025 | V | 3 | |||
| Low Output Voltage | VOL | 0.025 | V | 3 | |||
| Output Resistance HI State | RO | 2.8 | 5 | Ω | IOUT = 10mA, VS = 18V | 3 | |
| Output Resistance HI State | RO | 3.7 | 8 | Ω | VIN = 0.8V, IOUT = 10mA, VS = 18V | 3 | |
| Output Resistance LO State | RO | 3.5 | 5 | Ω | IOUT = 10mA, VS = 18V | 3 | |
| Output Resistance LO State | RO | 4.3 | 8 | Ω | VIN = 2.4V, IOUT = 10mA, VS = 18V | 3 | |
| Latch-Up Protection Withstand Reverse Current | 500 | mA | Withstand Reverse Current; printed as >500 mA | 3 | |||
| Rise Time | tR | 23 | 35 | ns | test Figure 1, CL = 1800pF | 3 | |
| Rise Time | tR | 28 | 60 | ns | 3 | ||
| Fall Time | tF | 25 | 35 | ns | test Figure 1, CL = 1800pF | 3 | |
| Fall Time | tF | 32 | 60 | ns | 3 | ||
| Delay Time | tD1 | 33 | 75 | ns | test Figure 1, CL = 1800pF | 3 | |
| Delay Time | tD1 | 32 | 100 | ns | 3 | ||
| Delay Time | tD2 | 38 | 75 | ns | test Figure 1, CL = 1800pF | 3 | |
| Delay Time | tD2 | 38 | 100 | ns | 3 | ||
| Pulse Width | tPW | 400 | ns | test Figure 1 | 3 | ||
| Power Supply Current | IS | 1.5 | 2.5 | mA | VIN = 3.0V (both inputs) | 3 | |
| Power Supply Current (bold, -40°C to +85°C) | IS | 2 | 3.5 | mA | 3 | ||
| Power Supply Current | IS | 0.15 | 0.25 | mA | VIN = 0.0V (both inputs) | 3 | |
| Power Supply Current (bold, -40°C to +85°C) | IS | 0.2 | 0.3 | mA | 3 | ||
| Supply Voltage | VS | 22 | V | Absolute Maximum Ratings | 3 | ||
| Input Voltage (max VS + 0.3V; min GND, 5V as printed) | VIN | -5 | 0.3 | V | 3 | ||
| Junction Temperature | TJ | 150 | °C | 3 | |||
| Storage Temperature Range | TSTG | -65 | 150 | °C | 3 | ||
| ESD Susceptibility | 1000 | V | Note 3 | 3 | |||
| Supply Voltage (VS) | VS | 4.5 | 18 | V | Operating Ratings | 3 | |
| Temperature Range B Version | TA | -40 | 85 | °C | B Version (MIC4425YM is the B-grade, Pb-free 8-pin SOIC) | 3 | |
| Package Thermal Resistance SOIC junction-to-ambient | θJA | 120 | °C/W | SOIC | 3 | ||
| Package Thermal Resistance SOIC junction-to-case | θJC | 75 | °C/W | SOIC | 3 | ||
| Peak Output Current | IPK | 3 | A | 3 |
CAD (KiCad official)
- Symbol:
MIC4425YM - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
mic4425ym-etched.step/mic4425ym-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);mic4425ym.step/mic4425ym.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Microchip Tech datasheet (13 pp, sha256
7c71a3a03a494f5a, retrieved 2026-10-28, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).