component
MIC39102YM-TR
Public Made by Adomby adom
Microchip Tech Linear Voltage Regulators (LDO), SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
MIC39102YM-TR
Microchip Tech · Linear Voltage Regulators (LDO) · SOIC-8
MIC39102YM-TR from Microchip Tech, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | EN | input | Enable input is CMOS-compatible: logic HIGH enables the regulator, while logic LOW or open puts it in shutdown. |
| 2 | IN | power_in | Supply input, with an operating supply range of +2.25V to +16V per the operating ratings. |
| 3 | OUT | power_out | Regulator output, specified for a minimum guaranteed output current of 1A. |
| 4 | ADJ | input | Adjustable feedback input, connected to a resistive voltage-divider network with a 1.240V typical reference. |
| 5 | GND | power_in | Ground pin, joined internally to the die attach paddle and to pins 6 to 8 for thermal conduction. |
| 6 | GND | power_in | Ground pin, joined internally to the die attach paddle and to pins 5, 7 and 8 for thermal conduction. |
| 7 | GND | power_in | Ground pin, joined internally to the die attach paddle and to pins 5, 6 and 8 for thermal conduction. |
| 8 | GND | power_in | Ground pin, joined internally to the die attach paddle and to pins 5 to 7 for thermal conduction. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | SOIC-8 |
| Category | Power Management ICs |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Output Voltage | VOUT | -1 | 1 | % | IOUT = 10 mA | 4 | |
| Output Voltage | VOUT | -2 | 2 | % | 10 mA ≤ IOUT ≤ 1A, VOUT +1V ≤ VIN ≤ 8V | 4 | |
| Line Regulation | 0.06 | % | IOUT = 10 mA, VOUT + 1V ≤ VIN ≤ 16V | 4 | |||
| Line Regulation | 0.5 | % | IOUT = 10 mA, VOUT + 1V ≤ VIN ≤ 16V | 4 | |||
| Load Regulation | 0.2 | % | VIN = VOUT + 1V, 10 mA ≤ IOUT ≤ 1A | 4 | |||
| Load Regulation | 1 | % | VIN = VOUT + 1V, 10 mA ≤ IOUT ≤ 1A | 4 | |||
| Output Voltage Temperature Coefficient | ∆VOUT/∆T | 40 | 100 | ppm/°C | Note 2 | 4 | |
| Dropout Voltage | VDO | 140 | 200 | mV | IOUT = 100 mA, ∆VOUT = -1% | 4 | |
| Dropout Voltage | VDO | 250 | mV | IOUT = 100 mA, ∆VOUT = -1% | 4 | ||
| Dropout Voltage | VDO | 300 | 500 | mV | IOUT = 750 mA, ∆VOUT = -1% | 4 | |
| Dropout Voltage | VDO | 410 | 550 | mV | IOUT = 1A, ∆VOUT = -1% | 4 | |
| Dropout Voltage | VDO | 630 | mV | IOUT = 1A, ∆VOUT = -1% | 4 | ||
| Ground Current | IGND | 11 | 20 | mA | IOUT = 1A, VIN = VOUT + 1V | 4 | |
| Current Limit | IOUT(LIM) | 1.8 | 2.5 | A | VOUT = 0V, VIN = VOUT + 1V | 4 | |
| Enable Input Voltage (Logic LOW, Off) | VEN | 0.8 | V | Logic LOW (Off) | 4 | ||
| Enable Input Voltage (Logic HIGH, On) | VEN | 2.25 | V | Logic HIGH (On) | 4 | ||
| Enable Input Current | IEN | 1 | 15 | 30 | µA | VEN = 2.25V | 5 |
| Enable Input Current | IEN | 75 | µA | VEN = 2.25V | 5 | ||
| Enable Input Current | IEN | 2 | µA | VEN = 0.8V | 5 | ||
| Enable Input Current | IEN | 4 | µA | VEN = 0.8V | 5 | ||
| Reference Voltage | 1.228 | 1.24 | 1.252 | V | IOUT = 10 mA | 5 | |
| Reference Voltage | 1.215 | 1.265 | V | 5 | |||
| Reference Voltage | 1.203 | 1.277 | V | Note 6 | 5 | ||
| Adjust Pin Bias Current | 40 | 80 | nA | 5 | |||
| Adjust Pin Bias Current | 120 | nA | 5 | ||||
| Junction Operating Temperature Range | TJ | -40 | 125 | °C | 6 | ||
| Storage Temperature Range | TS | -65 | 150 | °C | 6 | ||
| Lead Temperature | 260 | °C | Soldering, 5s | 6 | |||
| Thermal Resistance SOIC-8 | JC | 20 | °C/W | 6 | |||
| Supply Voltage (VIN) | VIN | -20 | 20 | V | 4 | ||
| Enable Voltage (VEN) | VEN | 20 | V | 4 | |||
| Supply Voltage (VIN) | VIN | 2.25 | 16 | V | 4 | ||
| Enable Voltage (VEN) | VEN | 16 | V | 4 |
CAD (KiCad official)
- Symbol:
MIC39102YM-TR - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
mic39102ym-tr-etched.step/mic39102ym-tr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);mic39102ym-tr.step/mic39102ym-tr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Microchip Tech datasheet (24 pp, sha256
62b25e59931397ca, retrieved 2026-11-05, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# MIC39102YM-TR
**Microchip Tech** · Linear Voltage Regulators (LDO) · SOIC-8
MIC39102YM-TR from Microchip Tech, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | EN | input | Enable input is CMOS-compatible: logic HIGH enables the regulator, while logic LOW or open puts it in shutdown. |
| 2 | IN | power_in | Supply input, with an operating supply range of +2.25V to +16V per the operating ratings. |
| 3 | OUT | power_out | Regulator output, specified for a minimum guaranteed output current of 1A. |
| 4 | ADJ | input | Adjustable feedback input, connected to a resistive voltage-divider network with a 1.240V typical reference. |
| 5 | GND | power_in | Ground pin, joined internally to the die attach paddle and to pins 6 to 8 for thermal conduction. |
| 6 | GND | power_in | Ground pin, joined internally to the die attach paddle and to pins 5, 7 and 8 for thermal conduction. |
| 7 | GND | power_in | Ground pin, joined internally to the die attach paddle and to pins 5, 6 and 8 for thermal conduction. |
| 8 | GND | power_in | Ground pin, joined internally to the die attach paddle and to pins 5 to 7 for thermal conduction. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | SOIC-8 |
| Category | Power Management ICs |
| Pins | 8 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Output Voltage | VOUT | -1 | | 1 | % | IOUT = 10 mA | 4 |
| Output Voltage | VOUT | -2 | | 2 | % | 10 mA ≤ IOUT ≤ 1A, VOUT +1V ≤ VIN ≤ 8V | 4 |
| Line Regulation | | | | 0.06 | % | IOUT = 10 mA, VOUT + 1V ≤ VIN ≤ 16V | 4 |
| Line Regulation | | | | 0.5 | % | IOUT = 10 mA, VOUT + 1V ≤ VIN ≤ 16V | 4 |
| Load Regulation | | | | 0.2 | % | VIN = VOUT + 1V, 10 mA ≤ IOUT ≤ 1A | 4 |
| Load Regulation | | | | 1 | % | VIN = VOUT + 1V, 10 mA ≤ IOUT ≤ 1A | 4 |
| Output Voltage Temperature Coefficient | ∆VOUT/∆T | | 40 | 100 | ppm/°C | Note 2 | 4 |
| Dropout Voltage | VDO | | 140 | 200 | mV | IOUT = 100 mA, ∆VOUT = -1% | 4 |
| Dropout Voltage | VDO | | | 250 | mV | IOUT = 100 mA, ∆VOUT = -1% | 4 |
| Dropout Voltage | VDO | | 300 | 500 | mV | IOUT = 750 mA, ∆VOUT = -1% | 4 |
| Dropout Voltage | VDO | | 410 | 550 | mV | IOUT = 1A, ∆VOUT = -1% | 4 |
| Dropout Voltage | VDO | | | 630 | mV | IOUT = 1A, ∆VOUT = -1% | 4 |
| Ground Current | IGND | | 11 | 20 | mA | IOUT = 1A, VIN = VOUT + 1V | 4 |
| Current Limit | IOUT(LIM) | | 1.8 | 2.5 | A | VOUT = 0V, VIN = VOUT + 1V | 4 |
| Enable Input Voltage (Logic LOW, Off) | VEN | | | 0.8 | V | Logic LOW (Off) | 4 |
| Enable Input Voltage (Logic HIGH, On) | VEN | 2.25 | | | V | Logic HIGH (On) | 4 |
| Enable Input Current | IEN | 1 | 15 | 30 | µA | VEN = 2.25V | 5 |
| Enable Input Current | IEN | | | 75 | µA | VEN = 2.25V | 5 |
| Enable Input Current | IEN | | | 2 | µA | VEN = 0.8V | 5 |
| Enable Input Current | IEN | | | 4 | µA | VEN = 0.8V | 5 |
| Reference Voltage | | 1.228 | 1.24 | 1.252 | V | IOUT = 10 mA | 5 |
| Reference Voltage | | 1.215 | | 1.265 | V | | 5 |
| Reference Voltage | | 1.203 | | 1.277 | V | Note 6 | 5 |
| Adjust Pin Bias Current | | | 40 | 80 | nA | | 5 |
| Adjust Pin Bias Current | | | | 120 | nA | | 5 |
| Junction Operating Temperature Range | TJ | -40 | | 125 | °C | | 6 |
| Storage Temperature Range | TS | -65 | | 150 | °C | | 6 |
| Lead Temperature | | | | 260 | °C | Soldering, 5s | 6 |
| Thermal Resistance SOIC-8 | JC | | 20 | | °C/W | | 6 |
| Supply Voltage (VIN) | VIN | -20 | | 20 | V | | 4 |
| Enable Voltage (VEN) | VEN | | | 20 | V | | 4 |
| Supply Voltage (VIN) | VIN | 2.25 | | 16 | V | | 4 |
| Enable Voltage (VEN) | VEN | | | 16 | V | | 4 |
## CAD (KiCad official)
- Symbol: `MIC39102YM-TR`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files: `mic39102ym-tr-etched.step` / `mic39102ym-tr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `mic39102ym-tr.step` / `mic39102ym-tr.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Microchip Tech datasheet](docs/mic39102ym-tr-datasheet.pdf) (24 pp, sha256 `62b25e59931397ca`, retrieved 2026-11-05, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/mic39102ym-tr-datasheet.pdf)