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MIC39102M

Public Made by Adom

by adom

HGSEMI Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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MIC39102M

HGSEMI · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOP-8

MIC39102M from HGSEMI, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 EN input Enable input is CMOS/TTL compatible: logic high enables the regulator, while logic low or open shuts it down, and EN may be tied directly to VIN and pulled up to the maximum supply voltage of 16V (absolute maximum +20V).
2 IN power_in Supply input, specified for 2.25V to 16V with an absolute maximum of 20V, and bypass with a 1µF or greater capacitor when the supply is a battery or more than 10 cm from bulk supply capacitance.
3 OUT power_out Regulator output, which requires an output capacitor (10µF or greater with ESR below 2Ω) for stability and needs a minimum load current of 10mA for proper regulation.
4 ADJ input Adjustment feedback input (MIC39102 only) that connects to a resistive divider between OUT and GND, setting VOUT = 1.240V × (R1/R2) over a 1.24V to 16V range with a typical bias current of 40 nA.
5 GND power_in Ground connection; pins 5 through 8 are all ground and should be connected together to the system ground.
6 GND power_in Ground connection; pins 5 through 8 are all ground and should be connected together to the system ground.
7 GND power_in Ground connection; pins 5 through 8 are all ground and should be connected together to the system ground.
8 GND power_in Ground connection; pins 5 through 8 are all ground and should be connected together to the system ground.

Key specifications

Parameter Value
Manufacturer HGSEMI
Package SOP-8
Category Power Management (PMIC)
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage VIN -20 20 V 3
Enable voltage VEN 20 V 3
Storage temperature TSTG -65 150 ℃ 3
Lead temperature TL 245 ℃ soldering, 10 sec. 3
Supply voltage VIN 2.25 16 V 4
Enable voltage VEN 2.25 16 V 4
Junction temperature TJ -40 125 ℃ 4
Output voltage accuracy VOUT -1 1 % 10mA 4
Output voltage accuracy VOUT -2 2 % 10mA ≤ IOUT ≤ 1A, VOUT+1V ≤ VIN ≤ 8V 4
Line regulation LNR 0.06 0.5 % IOUT = 10mA, VOUT+1V ≤ VIN ≤ 16V 4
Load regulation LDR 0.2 1 % VIN = VOUT+1V, 10mA ≤ IOUT ≤ 1A 4
Dropout voltage VDO 150 250 mV IOUT = 100mA, VOUT = -1% 4
Dropout voltage VDO 330 500 mV IOUT=750mA, VOUT = -1% 4
Dropout voltage VDO 410 630 mV IOUT = 1A, VOUT = -1% 4
Ground current IGND 12 20 mA IOUT = 1A, VIN = VOUT+1V 4
Current limit IOUT(lim) 1.8 2.5 µA VOUT = 0V, VIN = VOUT+1V 4
Turn-on time tON 1.3 5 ms 4
Enable input voltage logic low (off) VEN 0.8 V Logic Low (off) 4
Enable input voltage logic high (on) VEN 2.25 V Logic High (on) 4
Enable input current IEN 1 15 µA VEN=2.25V 4
Enable input current IEN 2 4 µA VEN=0.8V 4
Flag output leakage current IFLG(leak) 0.01 2 µA VOH = 16V 4
Flag output low voltage VFLG(do) 240 400 mV VIN = 0.9 x VOUT (Nominal), IOL= 250µA 4
Reference voltage VREF 1.215 1.24 1.265 V 5
Reference voltage (Note 9 range) VREF 1.203 1.277 V Note 9 5
ADJ pin bias current IADJ 40 120 nA 5
ADJ pin bias current temperature coefficient 0.1 99.2 nA/℃ 5
Output voltage temperature coefficient ∆VOUT/∆T 40 100 ppm/℃ 4
Dropout voltage VDO 275 mV IOUT = 500mA, VOUT = -1% 4
Ground current IGND 700 µA IOUT = 100mA, VIN = VOUT+1V 4
Ground current IGND 4 mA IOUT = 500mA, VIN = VOUT+1V 4
Ground current IGND 7 mA IOUT = 750mA, VIN = VOUT+1V 4
Flag low threshold VFLG 93 % 4
Flag high threshold VFLG 99.2 % 4
Flag hysteresis 1 4
Reference voltage temperature coefficient 20 ppm/℃ 5
Thermal resistance junction-to-case, SOP-8 θJC 20 ℃/W 4

CAD (KiCad official)

  • Symbol: MIC39102M
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOP-8 (KiCad packages3D, STEP)
  • 3D model files: mic39102m-etched.step / mic39102m-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); mic39102m.step / mic39102m.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: HGSEMI datasheet (12 pp, sha256 231b4f6360480038, retrieved 2026-10-19, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF