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MIC2176-2YMM

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Microchip Tech DC-DC Converters, MSOP-10. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.

componentpower management (pmic)mic2176-2ymm
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mic2176-2ymm-etched.fit.json mic2176-2ymm: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
mic2176-2ymm-etched.glb mic2176-2ymm: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
mic2176-2ymm-etched.step mic2176-2ymm: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
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page.json mic2176-2ymm: specified limits as data (metadata.characteristics, 31 rows from the datasheet) · Ray 26d ago
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MIC2176-2YMM

Microchip Tech · DC-DC Converters · MSOP-10

MIC2176-2YMM from Microchip Tech, in a MSOP-10. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 HSD input High-Side MOSFET Drain Connection (Input). Input of the adaptive on-time control circuitry. Operating range 4.5V to 75V (abs max -0.3V to +76V). Requires a 0.1uF ceramic capacitor between HSD and PGND placed close to the IC.
2 EN input Enable (Input). CMOS-compatible logic-level enable; logic high or floating = enable, logic low = shutdown. In off state VDD supply current drops to ~0.7mA. Logic high >=1.2V, logic low <=0.4V (4.5V<VDD<5.5V). Do not connect EN to HSD.
3 FB input Feedback (Input) to the transconductance amplifier of the control loop. Regulated to 0.8V reference (±1% at 0-85°C, ±1.5% over full temp). A resistor divider from VOUT sets the output voltage. FB bias current typ 5nA (max 500nA).
4 GND power_in Signal ground. Ground return for the VDD bias supply and internal control circuitry. Should be routed separately from PGND (power ground) and joined at a single point.
5 VDD power_in VDD Bias input for the internal reference and control sections. Operating range 4.5V to 5.5V. Requires a 1uF ceramic bypass capacitor from VDD to PGND placed next to the IC. Quiescent current ~1.4mA (max 3mA).
6 DL output Low-Side Gate Drive (Output). High-current gate driver for the external low-side N-channel MOSFET. Output swings from GND to VDD. On-resistance typ 1.2Ω (low) / 1.8Ω (high), driver sourcing/sinking 10mA.
7 PGND power_in Power Ground. Ground return path for the buck converter power stage; connects to the sources of the low-side external N-channel MOSFETs, negative terminals of input capacitors, and negative terminals of output capacitors. Route separately from signal GND with a low-impedance loop.
8 DH output High-Side Gate Drive (Output). High-current gate driver for the external high-side N-channel MOSFET, referenced to the SW node (floating). Swings between SW and BST. A small series resistor between DH and the MOSFET gate can slow turn-on/turn-off. On-resistance typ 2.1Ω (high) / 1.8Ω (low).
9 SW input Switch Node and Current-Sense input. High-current output driver return that connects directly to the switch node (drain of low-side MOSFET / source of high-side MOSFET). Also senses inductor current across the low-side MOSFET RDS(on) during OFF time - use a Kelvin connection to the low-side MOSFET drain for accurate sensing.
10 BST power_in Bootstrap (Output). Bootstrapped supply for the high-side N-channel MOSFET gate driver. Connect a Schottky diode from VDD to BST and a 0.1uF boost capacitor from BST to SW. A small series resistor at BST can slow high-side MOSFET turn-on. Abs max -0.3V to (VSW+6V), -0.3V to +82V vs PGND.

Key specifications

Parameter Value
Manufacturer Microchip Tech
Package MSOP-10
Category Power Management (PMIC)
Pins 10

Ordering variants

Same part, different packaging or reel option.

  • MIC2176-2YMM1YMM
  • MIC2176-2YMM
  • MIC2176-2YMM3YMM

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
VHSD to PGND VHSD -0.3 76 V 4
VDD to PGND VDD -0.3 6 V 4
VSW to PGND VSW -0.3 V 4
VBST to VSW VBST -0.3 6 V 4
VBST to PGND VBST -0.3 82 V 4
VEN to PGND VEN -0.3 V 4
VFB to PGND VFB -0.3 V 4
PGND to GND -0.3 0.3 V 4
Junction Temperature TJ 150 °C 4
Storage Temperature TS -65 150 °C 4
Lead Temperature (soldering) 260 °C soldering, 10sec 4
Supply Voltage (VHSD) VHSD 4.5 75 V 4
Bias Voltage (VDD) VDD 4.5 5.5 V 4
Enable Input (VEN) VEN 0 V 4
Junction Temperature (TJ) TJ -40 125 °C 4
HSD Voltage Range VHSD 4.5 75 V 4
Operating Bias Voltage VDD 4.5 5 5.5 V 4
Undervoltage Lockout Trip Level 3.2 3.85 4.45 V VDD Rising 4
Quiescent Supply Current 1.4 3 mA VFB = 1.5V 4
Shutdown Supply Current 0.7 2 mA SW = unconnected, VEN = 0V 4
Feedback Reference Voltage 0.792 0.8 0.808 V 0°C ≤ TJ ≤ 85°C (±1.0%) 4
Feedback Reference Voltage 0.788 0.8 0.812 V −40°C ≤ TJ ≤ 125°C (±1.5%) 4
FB Bias Current 5 500 nA VFB = 0.8V 4
EN Bias Current 50 100 µA VEN = 0V 4
Switching Frequency 150 200 250 kHz MIC2176-2; note 6: measured in test mode 4
Current-Limit Threshold 103 130 162 mV VFB = 0.8V 5
Short-Circuit Threshold 19 48 77 mV VFB = 0V 5
DH On-Resistance, High State 2.1 3.3 Ω 5
DH On-Resistance, Low State 1.8 3.3 Ω 5
DL On-Resistance, High State 1.8 3.3 Ω 5
DL On-Resistance, Low State 1.2 2.3 Ω 5

CAD (KiCad official)

  • Symbol: MIC2176-2YMM
  • Footprint: Package_SO:MSOP-10_3x3mm_P0.5mm
  • 3D model: MSOP-10 (KiCad packages3D, STEP)
  • 3D model files: mic2176-2ymm-etched.step / mic2176-2ymm-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); mic2176-2ymm.step / mic2176-2ymm.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Microchip Tech datasheet (31 pp, sha256 303da73146c17fee, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF