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Ray Set visibility: public 35d416a 13d ago
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{
  "schema_version": 1,
  "type": "component",
  "slug": "mf10ccwmx",
  "title": "MF10CCWMX",
  "brief": "Texas Instruments Switched Capacitor Filters, SOIC-20-300mil. Pinout reviewed by a person against the datasheet, KiCad symbol/footprint/3D.",
  "version": "0.1.0",
  "license": "CC-BY-SA-4.0",
  "tags": [
    "component",
    "filters",
    "mf10ccwmx",
    "factory-2.0.0",
    "extractor-text"
  ],
  "component": {
    "mpn": "MF10CCWMX",
    "manufacturer": "Texas Instruments",
    "package": "SOIC-20-300mil",
    "pin_count": 20,
    "category": "Filters",
    "subcategory": "Switched Capacitor Filters",
    "datasheet": "https://www.ti.com/cn/lit/gpn/mf10-n",
    "parts": {
      "symbol": "mf10ccwmx.kicad_sym",
      "footprint": "mf10ccwmx.kicad_mod",
      "model_3d": "mf10ccwmx-hero.glb",
      "model_3d_plain": "mf10ccwmx-etched.glb",
      "model_3d_step": "mf10ccwmx-etched.step",
      "model_3d_step_plain": "mf10ccwmx.step",
      "lbr": "mf10ccwmx.lbr"
    },
    "distributor_links": {
      "lcsc": "C2869221",
      "digikey": "MF10CCWMXTR-ND",
      "mouser": "926-MF10CCWMX"
    },
    "distributor_check": {
      "checked_at": "2026-10-20T23:11:59Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": "MF10CCWMXTR-ND",
        "status": "found",
        "lifecycle": "Obsolete"
      },
      "mouser": {
        "pn": "926-MF10CCWMX",
        "status": "found",
        "lifecycle": "Obsolete"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "LP",
        "type": "output",
        "description": "Second-order lowpass output that can typically sink 1.5 mA and source 3 mA, and typically swings to within 1 V of each supply."
      },
      {
        "number": "2",
        "name": "BP",
        "type": "output",
        "description": "Second-order bandpass output that can typically sink 1.5 mA and source 3 mA, and typically swings to within 1 V of each supply."
      },
      {
        "number": "3",
        "name": "N/AP/HP",
        "type": "output",
        "description": "Configurable notch, allpass or highpass output that can typically sink 1.5 mA and source 3 mA, and typically swings to within 1 V of each supply."
      },
      {
        "number": "4",
        "name": "INV",
        "type": "input",
        "description": "Inverting input of the summing op-amp; it is high impedance with the non-inverting input internally tied to AGND, so it acts as a low-impedance current summing junction."
      },
      {
        "number": "5",
        "name": "S1",
        "type": "input",
        "description": "Signal input for allpass configurations (modes 4 and 5) that should be driven with a source impedance below 1 kΩ, or tied to AGND if not driven."
      },
      {
        "number": "6",
        "name": "SA/B",
        "type": "input",
        "description": "Switch control that connects one summer input to AGND when tied to V- or to the LP output when tied to V+."
      },
      {
        "number": "7",
        "name": "VA+",
        "type": "power_in",
        "description": "Analog positive supply, internally connected to VD+ through the substrate, so it should be derived from the same supply source and may be tied to VD+ and bypassed with a single capacitor."
      },
      {
        "number": "8",
        "name": "VD+",
        "type": "power_in",
        "description": "Digital positive supply, internally connected to VA+ through the substrate, so it should be derived from the same supply source and may be tied to VA+ and bypassed with a single capacitor."
      },
      {
        "number": "9",
        "name": "LSh",
        "type": "input",
        "description": "Level shift pin for clock-level and supply configurations: tie to system ground for ±5V CMOS or 0 to +5V TTL clocks, and bias at +5V for CMOS clocks in 10V single-supply operation."
      },
      {
        "number": "10",
        "name": "CLKA",
        "type": "input",
        "description": "Clock input for the first filter building block that should match the level of CLKB (TTL or CMOS) and have a duty cycle close to 50%, especially above 200 kHz."
      },
      {
        "number": "11",
        "name": "CLKB",
        "type": "input",
        "description": "Clock input for the second filter building block that should match the level of CLKA (TTL or CMOS) and have a duty cycle close to 50%, especially above 200 kHz."
      },
      {
        "number": "12",
        "name": "50/100/CL",
        "type": "input",
        "description": "Tie high for a 50:1 clock-to-center-frequency ratio, mid-supply for 100:1, or low to trigger a current limit of about 2.5 mA that aborts filtering."
      },
      {
        "number": "13",
        "name": "VD-",
        "type": "power_in",
        "description": "Digital negative supply, internally connected to VA- through the substrate, so it should be derived from the same supply source as VA-."
      },
      {
        "number": "14",
        "name": "VA-",
        "type": "power_in",
        "description": "Analog negative supply, internally connected to VD- through the substrate, so it should be derived from the same supply source as VD-."
      },
      {
        "number": "15",
        "name": "AGND",
        "type": "power_in",
        "description": "Analog ground that should be connected to system ground for dual supply or biased to mid-supply for single supply, and requires a clean ground for optimum filter performance."
      },
      {
        "number": "16",
        "name": "S1",
        "type": "input",
        "description": "Second signal input for allpass configurations (modes 4 and 5) that should be driven with a source impedance below 1 kΩ, or tied to AGND if not driven."
      },
      {
        "number": "17",
        "name": "INV",
        "type": "input",
        "description": "Second inverting input of the summing op-amp; it is high impedance with the non-inverting input internally tied to AGND, so it acts as a low-impedance current summing junction."
      },
      {
        "number": "18",
        "name": "N/AP/HP",
        "type": "output",
        "description": "Second configurable notch, allpass or highpass output that can typically sink 1.5 mA and source 3 mA, and typically swings to within 1 V of each supply."
      },
      {
        "number": "19",
        "name": "BP",
        "type": "output",
        "description": "Second second-order bandpass output that can typically sink 1.5 mA and source 3 mA, and typically swings to within 1 V of each supply."
      },
      {
        "number": "20",
        "name": "LP",
        "type": "output",
        "description": "Second second-order lowpass output that can typically sink 1.5 mA and source 3 mA, and typically swings to within 1 V of each supply."
      }
    ],
    "provenance": {
      "extractor": "ds2sf",
      "datasheet": {
        "url": "https://www.ti.com/cn/lit/gpn/mf10-n",
        "pages": 35,
        "sha256": "0e837564aa0bc5e6",
        "source_tier": "lcsc"
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      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 20,
        "described": 20,
        "cites_pages": true,
        "refuses_to_fabricate": true
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        "seat": "z = 0",
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  "metadata": {
    "specs": {
      "Manufacturer": "Texas Instruments",
      "Package": "SOIC-20-300mil",
      "Category": "Filters",
      "Pins": "20"
    },
    "characteristics": {
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      "source": "datasheet",
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      "rows": [
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          "name": "Supply Voltage (V+ − V−)",
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          "typ": null,
          "max": 14,
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          "source_page": 3,
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          "name": "Maximum Supply Current",
          "symbol": "IS",
          "kind": "electrical",
          "unit": "mA",
          "min": null,
          "typ": 8,
          "max": 12,
          "conditions": "Clock applied to pins 10 & 11; no input signal",
          "source_page": 3,
          "source": "datasheet"
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        {
          "name": "Center Frequency Range (min)",
          "symbol": "fO",
          "kind": "electrical",
          "unit": "Hz",
          "min": 0.2,
          "typ": 0.1,
          "max": null,
          "conditions": "fO × Q < 200 kHz",
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          "source_page": 3,
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        {
          "name": "Clock Frequency Range (min)",
          "symbol": "fCLK",
          "kind": "electrical",
          "unit": "Hz",
          "min": 10,
          "typ": 5,
          "max": null,
          "conditions": "",
          "source_page": 3,
          "source": "datasheet"
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        {
          "name": "Clock Frequency Range (max)",
          "symbol": "fCLK",
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          "unit": "MHz",
          "min": null,
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          "name": "Clock to Center Frequency Ratio Deviation (50:1)",
          "symbol": "fCLK/fO",
          "kind": "electrical",
          "unit": "%",
          "min": -1.5,
          "typ": 0.2,
          "max": 1.5,
          "conditions": "Vpin12 = 5V; Q = 10, Mode 1; fCLK = 250 kHz",
          "source_page": 3,
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        {
          "name": "Clock to Center Frequency Ratio Deviation (100:1)",
          "symbol": "fCLK/fO",
          "kind": "electrical",
          "unit": "%",
          "min": -1.5,
          "typ": 0.2,
          "max": 1.5,
          "conditions": "Vpin12 = 0V; Q = 10, Mode 1; fCLK = 500 kHz",
          "source_page": 3,
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        },
        {
          "name": "Q Error (MAX)",
          "symbol": "Q Error (MAX)",
          "kind": "electrical",
          "unit": "%",
          "min": -6,
          "typ": 2,
          "max": 6,
          "conditions": "Vpin12 = 5V; Q = 10, Mode 1; fCLK = 250 kHz",
          "source_page": 3,
          "source": "datasheet"
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        {
          "name": "DC Lowpass Gain",
          "symbol": "HOLP",
          "kind": "electrical",
          "unit": "dB",
          "min": -0.2,
          "typ": 0,
          "max": 0.2,
          "conditions": "Mode 1; R1 = R2 = 10k",
          "source_page": 3,
          "source": "datasheet"
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        {
          "name": "DC Offset Voltage",
          "symbol": "VOS1",
          "kind": "electrical",
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          "min": -20,
          "typ": 5,
          "max": 20,
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        {
          "name": "DC Offset Voltage",
          "symbol": "VOS2",
          "kind": "electrical",
          "unit": "mV",
          "min": -185,
          "typ": -150,
          "max": -85,
          "conditions": "Vpin12 = +5V; SA/B = V+; fCLK/fO = 50",
          "source_page": 3,
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          "name": "DC Offset Voltage",
          "symbol": "VOS3",
          "kind": "electrical",
          "unit": "mV",
          "min": -100,
          "typ": -70,
          "max": -20,
          "conditions": "Vpin12 = +5V; All Modes; fCLK/fO = 50",
          "source_page": 3,
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        {
          "name": "Minimum Output Voltage Swing",
          "symbol": "VOUT",
          "kind": "electrical",
          "unit": "V",
          "min": -3.8,
          "typ": 4.25,
          "max": 3.8,
          "conditions": "BP, LP pins; RL = 5k",
          "source_page": 3,
          "source": "datasheet"
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        {
          "name": "CMOS Clock Input Voltage, Logical 1",
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          "min": 3,
          "typ": null,
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          "source_page": 4,
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          "name": "Operating Temperature Range (TMIN to TMAX)",
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  "author": {
    "name": "Ray",
    "email": "[email protected]"
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