component
MF10CCWMX
Public Made by Adomby adom
Texas Instruments Switched Capacitor Filters, SOIC-20-300mil. Pinout reviewed by a person against the datasheet, KiCad symbol/footprint/3D.
main
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"component": {
"mpn": "MF10CCWMX",
"manufacturer": "Texas Instruments",
"package": "SOIC-20-300mil",
"pin_count": 20,
"category": "Filters",
"subcategory": "Switched Capacitor Filters",
"datasheet": "https://www.ti.com/cn/lit/gpn/mf10-n",
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"distributor_links": {
"lcsc": "C2869221",
"digikey": "MF10CCWMXTR-ND",
"mouser": "926-MF10CCWMX"
},
"distributor_check": {
"checked_at": "2026-10-20T23:11:59Z",
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"pn": "MF10CCWMXTR-ND",
"status": "found",
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"pins": [
{
"number": "1",
"name": "LP",
"type": "output",
"description": "Second-order lowpass output that can typically sink 1.5 mA and source 3 mA, and typically swings to within 1 V of each supply."
},
{
"number": "2",
"name": "BP",
"type": "output",
"description": "Second-order bandpass output that can typically sink 1.5 mA and source 3 mA, and typically swings to within 1 V of each supply."
},
{
"number": "3",
"name": "N/AP/HP",
"type": "output",
"description": "Configurable notch, allpass or highpass output that can typically sink 1.5 mA and source 3 mA, and typically swings to within 1 V of each supply."
},
{
"number": "4",
"name": "INV",
"type": "input",
"description": "Inverting input of the summing op-amp; it is high impedance with the non-inverting input internally tied to AGND, so it acts as a low-impedance current summing junction."
},
{
"number": "5",
"name": "S1",
"type": "input",
"description": "Signal input for allpass configurations (modes 4 and 5) that should be driven with a source impedance below 1 kΩ, or tied to AGND if not driven."
},
{
"number": "6",
"name": "SA/B",
"type": "input",
"description": "Switch control that connects one summer input to AGND when tied to V- or to the LP output when tied to V+."
},
{
"number": "7",
"name": "VA+",
"type": "power_in",
"description": "Analog positive supply, internally connected to VD+ through the substrate, so it should be derived from the same supply source and may be tied to VD+ and bypassed with a single capacitor."
},
{
"number": "8",
"name": "VD+",
"type": "power_in",
"description": "Digital positive supply, internally connected to VA+ through the substrate, so it should be derived from the same supply source and may be tied to VA+ and bypassed with a single capacitor."
},
{
"number": "9",
"name": "LSh",
"type": "input",
"description": "Level shift pin for clock-level and supply configurations: tie to system ground for ±5V CMOS or 0 to +5V TTL clocks, and bias at +5V for CMOS clocks in 10V single-supply operation."
},
{
"number": "10",
"name": "CLKA",
"type": "input",
"description": "Clock input for the first filter building block that should match the level of CLKB (TTL or CMOS) and have a duty cycle close to 50%, especially above 200 kHz."
},
{
"number": "11",
"name": "CLKB",
"type": "input",
"description": "Clock input for the second filter building block that should match the level of CLKA (TTL or CMOS) and have a duty cycle close to 50%, especially above 200 kHz."
},
{
"number": "12",
"name": "50/100/CL",
"type": "input",
"description": "Tie high for a 50:1 clock-to-center-frequency ratio, mid-supply for 100:1, or low to trigger a current limit of about 2.5 mA that aborts filtering."
},
{
"number": "13",
"name": "VD-",
"type": "power_in",
"description": "Digital negative supply, internally connected to VA- through the substrate, so it should be derived from the same supply source as VA-."
},
{
"number": "14",
"name": "VA-",
"type": "power_in",
"description": "Analog negative supply, internally connected to VD- through the substrate, so it should be derived from the same supply source as VD-."
},
{
"number": "15",
"name": "AGND",
"type": "power_in",
"description": "Analog ground that should be connected to system ground for dual supply or biased to mid-supply for single supply, and requires a clean ground for optimum filter performance."
},
{
"number": "16",
"name": "S1",
"type": "input",
"description": "Second signal input for allpass configurations (modes 4 and 5) that should be driven with a source impedance below 1 kΩ, or tied to AGND if not driven."
},
{
"number": "17",
"name": "INV",
"type": "input",
"description": "Second inverting input of the summing op-amp; it is high impedance with the non-inverting input internally tied to AGND, so it acts as a low-impedance current summing junction."
},
{
"number": "18",
"name": "N/AP/HP",
"type": "output",
"description": "Second configurable notch, allpass or highpass output that can typically sink 1.5 mA and source 3 mA, and typically swings to within 1 V of each supply."
},
{
"number": "19",
"name": "BP",
"type": "output",
"description": "Second second-order bandpass output that can typically sink 1.5 mA and source 3 mA, and typically swings to within 1 V of each supply."
},
{
"number": "20",
"name": "LP",
"type": "output",
"description": "Second second-order lowpass output that can typically sink 1.5 mA and source 3 mA, and typically swings to within 1 V of each supply."
}
],
"provenance": {
"extractor": "ds2sf",
"datasheet": {
"url": "https://www.ti.com/cn/lit/gpn/mf10-n",
"pages": 35,
"sha256": "0e837564aa0bc5e6",
"source_tier": "lcsc"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 20,
"described": 20,
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