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docs me6231a50m3g: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
viewers pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
me6231a50m3g-etched.fit.json me6231a50m3g: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
me6231a50m3g-etched.glb me6231a50m3g: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
me6231a50m3g-etched.step me6231a50m3g: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
me6231a50m3g.glb Publish 0.1.0 · Ray
me6231a50m3g.kicad_mod Publish 0.1.0 · Ray
me6231a50m3g.kicad_sym Publish 0.1.0 · Ray
me6231a50m3g.lbr rebuild the library on adom-lbr 2.32.0. The published copy was built by 2.18.0, which imported every KiCad roundrect an… · Ray
me6231a50m3g.step Publish 0.1.0 · Ray
package.json Publish 0.2.0 · Ray
pads.json pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
page.json me6231a50m3g: specified limits as data (metadata.characteristics, 15 rows from the datasheet) · Ray
README.md me6231a50m3g: specified limits as data (metadata.characteristics, 15 rows from the datasheet) · Ray

ME6231A50M3G

MICRONE · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT23-3

ME6231A50M3G from MICRONE, in a SOT23-3. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VSS power_in Ground return for the regulator. Connect to the system ground plane; place the CIN/CL bypass capacitor grounds close to this pin to minimize noise and improve PSRR.
2 VOUT power_out Regulated 5.0 V output (±1% accuracy). Capable of sourcing up to 500 mA (typ) with 125 mV dropout at IOUT=100 mA. Requires a ceramic output capacitor CL (recommended 10 µF, X5R/X7R) to VSS; a 0.1 µF bypass is not required. Internal active discharge (~500 Ω) pulls VOUT low when the part is disabled internally.
3 VIN power_in Unregulated supply input, 3 V to 18 V operating range (20 V absolute max). Bypass to VSS with a 10 µF ceramic capacitor (X5R/X7R recommended). Quiescent current is 1.8 µA typical.

Key specifications

Parameter Value
Manufacturer MICRONE
Package SOT23-3
Category PMIC
Pins 3

Ordering variants

Same part, different packaging or reel option.

  • ME6231A50M3GA18M3G
  • ME6231A50M3GA30M3G
  • ME6231A50M3GA33M3G
  • ME6231A50M3GA44M3G
  • ME6231A50M3G
  • ME6231A50M3GA30PG
  • ME6231A50M3GA33PG
  • ME6231A50M3GA36PG
  • ME6231A50M3GA40PG
  • ME6231A50M3GA44PG
  • ME6231A50M3GA50PG
  • ME6231A50M3GC18M5G
  • ME6231A50M3GC28M5G
  • ME6231A50M3GC30M5G
  • ME6231A50M3GC33M5G
  • ME6231A50M3GC36M5G
  • ME6231A50M3GC50M5G
  • ME6231A50M3GC33N4CG

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input voltage range VIN 3 18 V 5
Output voltage (effective) VOUT(E) 0.99 V IOUT=10mA, VIN=VOUT+1V; printed as X 0.99 (multiplier of nominal VOUT(T)) 5
Output voltage (specified) VOUT(T) 1.01 V 5
Load regulation ΔVOUT 7 20 mV VIN= VOUT+1V, 1mA≤IOUT≤100mA 5
Quiescent current ISS 1.8 3.6 μA VIN= VOUT+1V 5
Shutdown current ICEL 0 0.2 μA VCE=0V 5
CE pin high-level voltage (enable) VCEH 1.7 V Enable (开启) 5
CE pin low-level voltage (shutdown) VCEL 0.5 V Shutdown (关断) 5
VIN pin voltage range VIN -0.3 20 V 4
VOUT pin current IOUT 600 mA 4
Package power dissipation (SOT23-3) Pd 0.54 W TA=25℃, SOT23-3 4
Operating ambient temperature range TOpr -40 85 ℃ 4
Storage temperature range Tstg -55 150 ℃ 4
Junction temperature range TJ -40 150 ℃ 4
Junction-to-ambient thermal resistance (SOT23-3) θJA 230 ℃/W Junction to ambient, SOT23-3 4

CAD (KiCad official)

  • Symbol: ME6231A50M3G
  • Footprint: Package_TO_SOT_SMD:SOT-23-3
  • 3D model: SOT23-3 (KiCad packages3D, STEP)
  • 3D model files: me6231a50m3g-etched.step / me6231a50m3g-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); me6231a50m3g.step / me6231a50m3g.glb are the bare package body.

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
me6231a50m3g.step 59 KB You want the bare part, or you mark your own boards.
me6231a50m3g-etched.step 2.3 MB You want the part with ME6231A50M3G already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 549 faces against 69 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: MICRONE datasheet (13 pp, sha256 d4428272cf6ce8bd, retrieved 2026-08-17, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF