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ME4502-VB

Public Made by Adom

by adom

VBsemi Elec MOSFETs, SO-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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ME4502-VB

VBsemi Elec · MOSFETs · SO-8

ME4502-VB from VBsemi Elec, in a SO-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 S1 passive Source of MOSFET 1 (N-channel, 30 V, RDS(on) 0.011 ohm at VGS = 10 V).
2 G1 input Gate of MOSFET 1 (N-channel), VGS max ±20 V.
3 S2 passive Source of MOSFET 2 (P-channel, -30 V, RDS(on) 0.021 ohm at VGS = -10 V).
4 G2 input Gate of MOSFET 2 (P-channel), VGS max ±20 V.
5 D2 passive Drain of MOSFET 2 (P-channel), pulsed drain current IDM -60 A; shorted with pin 6.
6 D2 passive Drain of MOSFET 2 (P-channel), pulsed drain current IDM -60 A; shorted with pin 5.
7 D1 passive Drain of MOSFET 1 (N-channel), pulsed drain current IDM 60 A; shorted with pin 8.
8 D1 passive Drain of MOSFET 1 (N-channel), pulsed drain current IDM 60 A; shorted with pin 7.

Key specifications

Parameter Value
Manufacturer VBsemi Elec
Package SO-8
Category Triode/MOS Tube/Transistor
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Drain-Source Voltage N-ch VDS 30 V TA = 25 °C 1
Drain-Source Voltage P-ch VDS -30 V TA = 25 °C 1
Gate-Source Voltage N-ch VGS -20 20 V TA = 25 °C 1
Gate-Source Voltage P-ch VGS -20 20 V TA = 25 °C 1
Pulsed Drain Current N-ch IDM 60 A 10 µs pulse width 1
Pulsed Drain Current P-ch IDM -60 A 10 µs pulse width 1
Source-Drain Diode Current N-ch IS 3.6 A TC = 25 °C 1
Source-Drain Diode Current P-ch IS -3.6 A TC = 25 °C 1
Pulsed Source-Drain Current N-ch ISM 60 A 1
Pulsed Source-Drain Current P-ch ISM -60 A 1
Single Pulse Avalanche Current N-ch IAS 20 A L = 0.1 mH 1
Single Pulse Avalanche Current P-ch IAS -20 A L = 0.1 mH 1
Maximum Power Dissipation PD 3 W TA = 25 °C, both channels 1
Maximum Power Dissipation PD 2.28 W TA = 70 °C, both channels 1
Operating Junction and Storage Temperature Range TJ, Tstg -55 150 °C 1
Junction-to-Ambient Thermal Resistance N-ch RthJA 20 32.5 °C/W t ≤ 10 s 1
Junction-to-Ambient Thermal Resistance P-ch RthJA 27 32.5 °C/W t ≤ 10 s 1
Junction-to-Foot Thermal Resistance N-ch RthJF 10 20 °C/W Steady State 1
Junction-to-Foot Thermal Resistance P-ch RthJF 19 28 °C/W Steady State 1
Drain-Source Breakdown Voltage N-ch VDS 30 V VGS = 0 V, ID = 250 µA 2
Drain-Source Breakdown Voltage P-ch VDS -30 V VGS = 0 V, ID = - 250 µA 2
Gate Threshold Voltage N-ch VGS(th) 1 2.2 V VDS = VGS, ID = 250 µA 2
Gate Threshold Voltage P-ch VGS(th) -0.9 -2.5 V VDS = VGS, ID = - 250 µA 2
Gate-Body Leakage N-ch IGSS -100 100 nA VDS = 0 V, VGS = ± 20 V 2
Gate-Body Leakage P-ch IGSS -100 100 nA VDS = 0 V, VGS = ± 20 V 2
Zero Gate Voltage Drain Current N-ch IDSS 1 µA VDS = 30 V, VGS = 0 V 2
Zero Gate Voltage Drain Current P-ch IDSS -1 µA VDS = - 30 V, VGS = 0 V 2
Zero Gate Voltage Drain Current N-ch IDSS 10 µA VDS = 30 V, VGS = 0 V, TJ = 55 °C 2
Zero Gate Voltage Drain Current P-ch IDSS -10 µA VDS = - 30 V, VGS = 0 V, TJ = 55 °C 2
On-State Drain Current N-ch ID(on) 40 A VDS = 5 V, VGS = 10 V 2
On-State Drain Current P-ch ID(on) -40 A VDS = - 5 V, VGS = - 10 V 2
Gate Resistance N-ch Rg 0.3 1.3 2.6 Ω f = 1 MHz 2
Gate Resistance P-ch Rg 1.3 6.4 12.8 Ω f = 1 MHz 2
Total Gate Charge N-ch Qg 13.3 20 nC VDS = 20 V, VGS = 10 V, ID = 10 A 2
Total Gate Charge P-ch Qg 13 20 nC VDS = - 20 V, VGS = - 10 V, ID = - 10 A 2
Total Gate Charge N-ch Qg 6.5 10 nC VDS = 20 V, VGS = 4.5 V, ID = 10 A 2
Total Gate Charge P-ch Qg 21.7 33 nC VDS = - 20 V, VGS = - 4.5 V, ID = - 10 A 2
Turn-On Delay Time P-ch td(on) 10 20 ns VDD = - 20 V, RL = 2 Ω, ID ≅ - 10 A, VGEN = - 10 V, Rg = 1 Ω 3
Rise Time P-ch tr 9 18 ns VDD = - 20 V, RL = 2 Ω, ID ≅ - 10 A, VGEN = - 10 V, Rg = 1 Ω 3
Turn-Off Delay Time P-ch td(off) 50 90 ns VDD = - 20 V, RL = 2 Ω, ID ≅ - 10 A, VGEN = - 10 V, Rg = 1 Ω 3
Fall Time P-ch tf 13 26 ns VDD = - 20 V, RL = 2 Ω, ID ≅ - 10 A, VGEN = - 10 V, Rg = 1 Ω 3
Turn-On Delay Time N-ch td(on) 11 22 ns VDD = 20 V, RL = 3.7 Ω, ID ≅ 5.4 A, VGEN = 4.5 V, Rg = 1 Ω 3
Rise Time N-ch tr 12 22 ns VDD = 20 V, RL = 3.7 Ω, ID ≅ 5.4 A, VGEN = 4.5 V, Rg = 1 Ω 3
Turn-On Delay Time P-ch td(on) 42 75 ns VDD = - 20 V, RL = 2 Ω, ID ≅ - 10 A, VGEN = - 4.5 V, Rg = 1 Ω 3
Rise Time P-ch tr 40 70 ns VDD = - 20 V, RL = 2 Ω, ID ≅ - 10 A, VGEN = - 4.5 V, Rg = 1 Ω 3
Turn-Off Delay Time P-ch td(off) 40 70 ns VDD = - 20 V, RL = 2 Ω, ID ≅ - 10 A, VGEN = - 4.5 V, Rg = 1 Ω 3
Fall Time P-ch tf 18 35 ns VDD = - 20 V, RL = 2 Ω, ID ≅ - 10 A, VGEN = - 4.5 V, Rg = 1 Ω 3
Body Diode Voltage N-ch VSD 0.81 1.2 V IS = 5.4 A 3
Body Diode Voltage P-ch VSD -1.2 -0.77 V IS = - 2 A 3
Body Diode Reverse Recovery Time P-ch trr 41 80 ns IF = - 5 A, dI/dt = - 100 A/µs, TJ = 25 °C 3
Body Diode Reverse Recovery Charge P-ch Qrr 32 65 nC IF = - 5 A, dI/dt = - 100 A/µs, TJ = 25 °C 3
Drain-Source On-State Resistance N-ch RDS(on) 0.011 Ω VGS = 10 V, ID = 6.8 A 2
Drain-Source On-State Resistance P-ch RDS(on) 0.021 Ω VGS = - 10 V, ID = - 8 A 2
Drain-Source On-State Resistance N-ch RDS(on) 0.013 Ω VGS = 4.5 V, ID = 6.6 A 2
Drain-Source On-State Resistance P-ch RDS(on) 0.028 Ω VGS = - 4.5 V, ID = - 5 A 2
Forward Transconductance N-ch gfs 37 S VDS = 15 V, ID = 6.8 A 2
Forward Transconductance P-ch gfs 35 S VDS = - 15 V, ID = - 6.7 A 2

CAD (KiCad official)

  • Symbol: ME4502-VB
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SO-8 (KiCad packages3D, STEP)
  • 3D model files: me4502-vb-etched.step / me4502-vb-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); me4502-vb.step / me4502-vb.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: VBsemi Elec datasheet (14 pp, sha256 0ed4f1b4bcfd2761, retrieved 2026-10-27, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF