component
MD7673E50VC1
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Shanghai Mingda Microelectronics Linear Voltage Regulators (LDO), TO-263-5L. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
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MD7673E50VC1
Shanghai Mingda Microelectronics · Linear Voltage Regulators (LDO) · TO-263-5L
MD7673E50VC1 from Shanghai Mingda Microelectronics, in a TO-263-5L. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | EN | input | Enable pin: the device is enabled at a minimum of 1.6V and shut down at a maximum of 0.4V, and connecting EN to GND shuts the device down. |
| 2 | VIN | power_in | Power input pin, which must be closely decoupled to GND with a 4.7µF or greater ceramic capacitor; the input voltage range is 2 to 6V. |
| 3 | GND | power_in | Ground pin for the signal and power return of the regulator. |
| 4 | VOUT | power_out | Regulator output pin, which needs an output ceramic capacitor of 4.7µF or bigger placed as close as possible between VOUT and GND for stability, with continuous output current up to 3A. |
| 5 | ADJ | input | Adjustable pin: connect ADJ to GND for the internally set 5V output, or set VOUT with an external resistor divider using VOUT = VREF × (1 + R1/R2) with VREF of 0.7V nominal. |
| 6 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Shanghai Mingda Microelectronics |
| Package | TO-263-5L |
| Category | Power Management ICs |
| Pins | 6 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input Voltage | VIN | 2 | 6 | V | 4 | ||
| Output Voltage Tolerance | VOUT(S) | -2 | 2 | % | IOUT=1mA | 4 | |
| Temperature Stability | ΔVOUT/(ΔTa·VOUT(s)) | -100 | 100 | ppm/℃ | VIN=VEN=VOUT(S)+1.0V, IOUT=1mA, -40℃≤TA≤125℃ | 4 | |
| Reference Voltage Tolerance | 0.686 | 0.7 | 0.714 | V | 4 | ||
| ADJ Pin Threshold | 0.05 | 0.1 | 0.2 | V | 4 | ||
| Line Regulation | 3 | 15 | mV | VOUT(S)+1V≤VIN=VEN≤6V, IOUT=1mA | 4 | ||
| Load Regulation | VOUT2 | 15 | 25 | mV | VIN=VEN=VOUT(S)+1.0V, 1mA≤IOUT≤3A | 4 | |
| Shutdown Pin Current | 0.1 | 0.5 | μA | 4 | |||
| Enable Turn-On Threshold | 1.6 | V | Output ON | 4 | |||
| Enable Turn-Off Threshold | 0.4 | V | Output OFF | 4 | |||
| Max Output Discharge Resistance | 30 | Ω | to GND during Shutdown | 4 | |||
| Input Voltage (absolute maximum) | VIN | -0.3 | 7 | V | 3 | ||
| Output Voltage (absolute maximum) | VOUT | -0.3 | V | Upper limit printed as VIN+0.3 | 3 | ||
| Operating Ambient Temperature | Topr | -40 | 85 | ℃ | 3 | ||
| Storage Temperature | Tstg | -40 | 125 | ℃ | 3 | ||
| Continuous Output Current | IOUT | 3 | A | VIN>2.3V | 4 | ||
| Ground Current | IGND | 40 | μA | VEN=VIN, no load | 4 | ||
| Ground Current | IGND | 390 | μA | VEN=VIN, IOUT=100mA | 4 | ||
| Shutdown Current | ISHUT | 0.01 | μA | VEN=0 | 4 | ||
| Output Current Limit | ILIM | 4 | A | 4 | |||
| Dropout Voltage | VDROP | 350 | mV | VEN=VIN, VOUT≥3V, IOUT=3A | 4 | ||
| ADJ Pin Current | 10 | nA | VADJ = VREF | 4 | |||
| Shutdown Exit Delay Time | 0 | μs | 4 | ||||
| PGOOD Rise Threshold | PGHTH | 90 | % | 4 | |||
| PGOOD Hysteresis | PGHYS | 10 | % | 4 | |||
| PGOOD Delay | PGDLY | 1 | ms | 4 | |||
| PGOOD Sink Capability | 0.05 | V | IPGOOD = 10mA | 4 | |||
| Power Supply Ripple Rejection | PSRR | 61 | dB | f=1kHz, IOUT=10mA | 4 | ||
| Power Supply Ripple Rejection | PSRR | 54 | dB | f=10kHz, IOUT=10mA | 4 | ||
| Power Supply Ripple Rejection | PSRR | 42 | dB | f=100kHz, IOUT=10mA | 4 | ||
| Output Noise Voltage | VOUTN | 115 | µVRMS | CBP = 1µF, VOUT=3.3V, f=10Hz~100KHz | 4 | ||
| Thermal Shutdown Temperature | TSD | 175 | ℃ | 4 | |||
| Thermal Shutdown Hysteresis | TSD_HYS | 35 | ℃ | 4 | |||
| ESD Protection | ESD | 4000 | V | HBM | 3 | ||
| Thermal Resistance (junction to board) | RθJB | 60 | ℃/W | Row labelled TO252-5 in datasheet; mounted on JEDEC standard 4-layer (2s2p) PCB | 3 | ||
| Nominal Output Voltage (fixed 5V option) | VOUT | 5 | V | ADJ connected to GND (internal feedback) | 2 |
CAD (KiCad official)
- Symbol:
MD7673E50VC1 - Footprint:
Package_TO_SOT_SMD:TO-263-5_TabPin6 - 3D model: TO-263-5L (KiCad packages3D, STEP)
- 3D model files:
md7673e50vc1-etched.step/md7673e50vc1-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);md7673e50vc1.step/md7673e50vc1.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Shanghai Mingda Microelectronics datasheet (12 pp, sha256
c212681e3a9b0433, retrieved 2026-11-05, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).