MD7673C50SF4
Public Made by Adomby adom
Shanghai Mingda Microelectronics Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, ESOP-8-EP. Datasheet-verified pinout, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
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README
markdownMD7673C50SF4
Shanghai Mingda Microelectronics · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · ESOP-8-EP
MD7673C50SF4 from Shanghai Mingda Microelectronics, in a ESOP-8-EP. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GND | power_in | Ground reference for the regulator. Must be tied to the system ground plane; also connect to the ESOP-8 exposed thermal pad for best thermal performance. |
| 2 | EN | input | Enable input, active-high. Drive ≥1.6V to enable the regulator; drive ≤0.4V to shut down (IQ drops to ~0.01µA and VOUT is discharged to GND through ~30Ω). |
| 3 | VIN | power_in | Power supply input, 2V-6V. Decouple to GND with a 4.7µF (or larger) low-ESR X5R/X7R ceramic capacitor placed close to the pin. Pins 3 and 4 are tied together internally. |
| 4 | VIN | power_in | Power supply input (paralleled with pin 3) for reduced series resistance at 3A load. Bond both VIN pins to the same input rail. |
| 5 | VOUT | power_out | Regulated output pin, up to 3A. Requires a 4.7µF (or larger) low-ESR ceramic output capacitor to GND for stability. Pins 5 and 6 are tied together internally. |
| 6 | VOUT | power_out | Regulated output pin (paralleled with pin 5) for reduced series resistance at 3A load. Bond both VOUT pins to the same output rail. |
| 7 | ADJ | input | Adjust / feedback pin. Tie to GND to select the internal 5V fixed setting; connect to the tap of an external R1/R2 divider from VOUT to program VOUT = VREF × (1 + R1/R2), VREF = 0.7V nominal. ADJ input current is ≤10nA, ADJ threshold ~0.1V. |
| 8 | N.C. | unconnected | No internal connection. May be left floating or tied to GND per datasheet note. |
| EP | GND | power_in | Exposed thermal pad on the bottom of the ESOP-8 package. Must be soldered to the PCB ground plane both for the electrical ground return and for thermal dissipation (θJA ≈ 80 °C/W). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Shanghai Mingda Microelectronics |
| Package | ESOP-8-EP |
| Category | PMIC |
| Pins | 9 |
Ordering variants
Same part, different packaging or reel option.
MD7673C50SF4MD7673C50SF4A50SF4MD7673C50SF4B50SF4MD7673C50SF4E50UB2MD7673C50SF4E50VC1
CAD (KiCad official)
- Symbol:
MD7673C50SF4 - Footprint:
Package_SO:SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.29x3mm - 3D model: ESOP-8-EP (KiCad packages3D, STEP)
3D model downloads
Two STEP files. Same geometry, different body top:
| File | Size | Use it when |
|---|---|---|
md7673c50sf4.step |
125 KB | You want the bare part, or you mark your own boards. |
md7673c50sf4-etched.step |
2.5 MB | You want the part with MD7673C50SF4 already on it. |
The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 601 faces against 152 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Shanghai Mingda Microelectronics datasheet (13 pp, sha256
cdbd82a6988a0c52, retrieved 2026-08-17, tier: lcsc) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).