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Contents

README

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MD7672B50SF4

Shanghai Mingda Microelectronics · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · ESOP-8

MD7672B50SF4 from Shanghai Mingda Microelectronics, in a ESOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VOUT power_out Regulator output pin. Default fixed 5 V (adjustable 1.2-5 V via external divider; 0.7 V min with ADJ divider). Supplies up to 2 A. Place a low-ESR ceramic COUT ≥ 4.7 µF (X5R/X7R) as close to this pin as possible; ≥10 µF recommended for load currents >500 mA.
2 ADJ input Adjustable / feedback pin. Output voltage is programmed by an external resistive divider using VOUT = VREF·(1 + R1/R2) with VREF = 0.7 V nominal (0.686-0.714 V). Tie ADJ directly to GND to select the internal fixed 5 V setting. ADJ pin current ≈ 10 nA; threshold ≈ 0.1 V.
3 GND power_in Ground / signal return. Also serves as the thermal reference; must be tied to the exposed pad ground plane for proper heat dissipation.
4 N.C. unconnected No internal connection. May be left floating or tied to GND / left OPEN per datasheet note.
5 EN input Enable input, active-high. VEN ≥ 1.6 V enables the regulator; VEN ≤ 0.4 V shuts down the device (shutdown current 10 nA typ., output driven to 0 V through ~30 Ω internal discharge). Do not leave floating.
6 N.C. unconnected No internal connection. May be left floating or tied to GND / OPEN.
7 N.C. unconnected No internal connection. May be left floating or tied to GND / OPEN.
8 VIN power_in Power supply input, 2-6 V (absolute max −0.3 to 7 V). Must be decoupled to GND with a ≥4.7 µF low-ESR ceramic capacitor placed close to the pin; ≥10 µF recommended for load currents >500 mA.
EP GND power_in Exposed thermal pad on package bottom. Must be soldered to a large ground plane (both electrical return and thermal path). θJB = 80 °C/W for ESOP8.

Key specifications

Parameter Value
Manufacturer Shanghai Mingda Microelectronics
Package ESOP-8
Category PMIC
Pins 9

Ordering variants

Same part, different packaging or reel option.

  • MD7672B50SF4
  • MD7672B50SF4A50SF4
  • MD7672B50SF4E50UB2

CAD (KiCad official)

  • Symbol: MD7672B50SF4
  • Footprint: Package_SO:SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.41x3.3mm
  • 3D model: ESOP-8 (KiCad packages3D, STEP)
  • 3D model files: md7672b50sf4-etched.step / md7672b50sf4-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); md7672b50sf4.step / md7672b50sf4.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Shanghai Mingda Microelectronics datasheet (11 pp, sha256 e70bd5ca9e1c146d, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF