# MD7218E33QC3

**Shanghai Mingda Microelectronics** · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-23-5L

MD7218E33QC3 from Shanghai Mingda Microelectronics, in a SOT-23-5L. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VIN | power_in | Regulator input supply. Operating range 2.2V to 15V (absolute max 15V). Bypass to GND with a 2.2uF (low-ESR ceramic) input capacitor close to the pin. |
| 2 | GND | power_in | Ground reference for the regulator. Typical GND (quiescent) current is 1.6uA at Vout<=5.0V, no load. |
| 3 | EN | input | Enable input. Drive high to enable the regulator, low to shut down. Do not leave floating. |
| 4 | NC | unconnected | No connect. Leave floating or tie to GND per board convention. |
| 5 | VOUT | power_out | Regulated 3.3V output (E33 option), +/-2% accuracy, up to 1A. Requires a 2.2uF low-ESR ceramic output capacitor to GND. Current limit typical 1.5A, short-circuit foldback to ~30mA. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Shanghai Mingda Microelectronics |
| Package | SOT-23-5L |
| Category | PMIC |
| Pins | 5 |

## Ordering variants

Same part, different packaging or reel option.

- `MD7218E33QC3`
- `MD7218E33QC3PC1`
- `MD7218E33QC3SF4`
- `MD7218E33QC3PA1`
- `MD7218E33QC3YA2`
- `MD7218E33QC3UA2`

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Output Voltage | VOUT(S) | 0.98 |  | 1.02 | ×VOUT(S) | VIN=VOUT(S)+2V, IOUT=1mA | 4 |
| Dropout Voltage | VDROP |  | 4 | 8 | mV | IOUT=1mA | 4 |
| Dropout Voltage | VDROP |  | 650 | 900 | mV | IOUT=1A | 4 |
| Line Regulation | ΔVOUT/ΔVIN |  | 0.01 | 0.02 | ％/V | VOUT(S)+2V≤VIN≤15V, IOUT=1mA | 4 |
| Load Regulation | VOUT2 |  |  | 80 | mV | VIN=VOUT(S)+2V, 1mA≤IOUT≤1A, VOUT(S)≤5.0V | 4 |
| Temperature Stability |  | -50 |  | 50 | ppm/℃ | VIN = VOUT(S)+2V, IOUT=1mA, -40℃≤Ta≤125℃ | 4 |
| GND Current | IGND | 1 | 1.6 | 2 | µA | no load, VOUT(S)≤5.0V | 4 |
| Input Voltage | VIN | 2.2 |  | 18 | V |  | 4 |
| Maximum Output Current | IOUTMAX |  |  | 1 | A |  | 4 |
| Power Dissipation (SOT23-5L) | PD |  |  | 250 | mW |  | 3 |
| Input Voltage (absolute maximum) | VIN | -0.3 |  | 15 | V |  | 3 |
| Operating Ambient Temperature | Topr | -40 |  | 85 | ℃ |  | 3 |
| Storage Temperature | Tstg | -40 |  | 125 | ℃ |  | 3 |
| ESD Protection HBM | ESD HBM |  |  | 4000 | V |  | 3 |
| Thermal Resistance Junction-to-Board (SOT23-5L) | RθJB |  | 180 |  | ℃/W | Mounted on JEDEC standard 4layer (2s2p) PCB test board | 3 |
| Current Limit | ILIM |  | 1.5 |  | A | VIN= VOUT(S)+2V, VOUT = 0.95 ×VOUT(S) | 4 |
| Short Circuit Current | ISHORT |  | 30 |  | mA | VIN=VOUT(S)+2.0V, VOUT=0V | 4 |
| Over Temperature Protection | OTP |  | 150 |  | ℃ | IOUT=1mA | 4 |
| GND Current | IGND |  | 420 |  | µA | IOUT=100mA | 4 |
| Power Supply Rejection Ratio | PSRR |  | 71 |  | dB | f=10Hz, IOUT=10mA | 4 |
| Power Supply Rejection Ratio | PSRR |  | 70 |  | dB | f=100Hz, IOUT=10mA | 4 |
| Power Supply Rejection Ratio | PSRR |  | 51 |  | dB | f=1kHz, IOUT=10mA | 4 |

## CAD (KiCad official)

- Symbol: `MD7218E33QC3`
- Footprint: `Package_TO_SOT_SMD:SOT-23-5`
- 3D model: SOT-23-5L (KiCad packages3D, STEP)
- 3D model files: `md7218e33qc3-etched.step` / `md7218e33qc3-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `md7218e33qc3.step` / `md7218e33qc3.glb` are the bare package body.

## 3D model downloads

Two STEP files. Same geometry, different body top:

| File | Size | Use it when |
|---|---|---|
| [`md7218e33qc3.step`](md7218e33qc3.step) | 85 KB | You want the bare part, or you mark your own boards. |
| [`md7218e33qc3-etched.step`](md7218e33qc3-etched.step) | 2.4 MB | You want the part with `MD7218E33QC3` already on it. |

The marking in the etched file is real recessed geometry cut into the solid, not a
texture or a decal: 583 faces against 102 in the bare model. It
survives export, section views, and rendering in any CAD tool, and it drops straight
into KiCad or Fusion with no extra setup.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Shanghai Mingda Microelectronics datasheet](docs/md7218e33qc3-datasheet.pdf) (15 pp, sha256 `a1ab1acfaf9f63a7`, retrieved 2026-08-17, tier: lcsc)
- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/md7218e33qc3-datasheet.pdf)