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MD7218D50UA2
Public Made by Adomby adom
Shanghai Mingda Microelectronics Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, TO-252-2L. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownMD7218D50UA2
Shanghai Mingda Microelectronics · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · TO-252-2L
MD7218D50UA2 from Shanghai Mingda Microelectronics, in a TO-252-2L. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VIN | power_in | Regulator input supply; the absolute maximum rating is -0.3 to 15 V, and the regulator is specified with VIN at least VOUT(S)+2 V for regulation. |
| 2 | VOUT | power_out | Regulated output from the internal P-channel pass transistor, rated up to 1 A, and VOUT must not exceed VIN+0.3 V. |
| 3 | GND | power_in | Ground reference connection (shown as the tab/third pin on the TO252-2L top view), with GND current specified at 1.6 µA typical at no load for VOUT≤5.0 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Shanghai Mingda Microelectronics |
| Package | TO-252-2L |
| Category | Power Management (PMIC) |
| Pins | 3 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Output Voltage | VOUT(S) | 0.98 | 1.02 | VOUT(S) | VIN= VOUT(S)+2V, IOUT=1mA | 4 | |
| Output Voltage Accuracy | -2 | 2 | ％ | 1 | |||
| Nominal Output Voltage (MD7218D50) | VOUT | 5 | V | 2 | |||
| Dropout Voltage | VDROP | 4 | 8 | mV | IOUT=1mA | 4 | |
| Dropout Voltage | VDROP | 650 | 900 | mV | IOUT=1A | 4 | |
| Line Regulation | 0.01 | 0.02 | ％/V | VOUT(S)+2V≤VIN≤15V, IOUT=1mA | 4 | ||
| Load Regulation | 80 | mV | VIN=VOUT(S)+2V, 1mA≤IOUT≤1A, VOUT(S)≤5.0V | 4 | |||
| Temperature Stability | -50 | 50 | ppm/℃ | VIN = VOUT(S)+2V, IOUT=1mA, -40℃≤Ta≤125℃ | 4 | ||
| GND Current | IGND | 1 | 1.6 | 2 | µA | no load, VOUT(S)≤5.0V | 4 |
| Input Voltage | VIN | 2.2 | 18 | V | 4 | ||
| Maximum Output Current | IOUTMAX | 1 | A | 4 | |||
| Current Limit | ILIM | 1.5 | VIN= VOUT(S)+2V, VOUT = 0.95 ×VOUT(S) | 4 | |||
| Power Supply Rejection Ratio | PSRR | 71 | dB | f=10Hz, IOUT=10mA | 4 | ||
| Power Supply Rejection Ratio | PSRR | 70 | dB | f=100Hz, IOUT=10mA | 4 | ||
| Power Supply Rejection Ratio | PSRR | 51 | dB | f=1kHz, IOUT=10mA | 4 | ||
| Short Circuit Current | ISHORT | 30 | mA | VIN=VOUT(S)+2.0V, VOUT=0V | 4 | ||
| Over Temperature Protection | OTP | 150 | ℃ | IOUT=1mA | 4 | ||
| Input Voltage | VIN | -0.3 | 15 | V | 3 | ||
| Power Dissipation (TO252-2L) | PD | 1800 | mW | TO252-2L | 3 | ||
| Thermal Resistance Junction-to-Board (TO252-2L) | RθJB | 55 | ℃/W | TO252-2L, mounted on JEDEC standard 4-layer (2s2p) PCB | 3 | ||
| Operating Ambient Temperature | Topr | -40 | 85 | ℃ | 3 | ||
| Storage Temperature | Tstg | -40 | 125 | ℃ | 3 | ||
| ESD Protection | ESD HBM | 4000 | V | HBM | 3 |
CAD (KiCad official)
- Symbol:
MD7218D50UA2 - Footprint:
Package_TO_SOT_SMD:TO-252-2 - 3D model: TO-252-2L (KiCad packages3D, STEP)
- 3D model files:
md7218d50ua2-etched.step/md7218d50ua2-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);md7218d50ua2.step/md7218d50ua2.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Shanghai Mingda Microelectronics datasheet (15 pp, sha256
a1ab1acfaf9f63a7, retrieved 2026-10-20, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).