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MD6127C24
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Shanghai Mingda Microelectronics Linear Voltage Regulators (LDO), SOT-23-5. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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MD6127C24
Shanghai Mingda Microelectronics · Linear Voltage Regulators (LDO) · SOT-23-5
MD6127C24 from Shanghai Mingda Microelectronics, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | DS | input | Delay-time ON/OFF select input that must be fixed at a low or high level; a high level shortens the release delay to about 110-330 µs (versus about 130-290 ms at low), with VSH ≥ 1.0 V and VSL ≤ 0.3 V at VDD = 6.0 V. |
| 2 | VSS | power_in | Ground terminal, the reference for the supply and output levels (VDD − VSS absolute maximum rating is 15 V). |
| 3 | NC | unconnected | No connection; the pin is not connected internally and is not used in the circuit. |
| 4 | VOUT | output | Voltage detection output: NMOS open-drain output rated VSS−0.3 V to VSS+15 V, CMOS output rated VSS−0.3 V to VDD+0.3 V, with output current absolute maximum 50 mA. |
| 5 | VDD | power_in | Detection voltage input and supply, with operating voltage range 1 V to 12 V and absolute maximum VDD − VSS of 15 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Shanghai Mingda Microelectronics |
| Package | SOT-23-5 |
| Category | Power Management ICs |
| Pins | 5 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Detection voltage accuracy | -VDET | -2 | 2 | % | Printed as ±2% accuracy in product table and features | 1 | |
| Hysteresis width | VHYS | 30 | 60 | 100 | mV | 3 | |
| Supply current | Iss | 1.1 | 5 | μA | VDD=3.5V, MD6127C22~26 row | 3 | |
| Operating voltage | VDD | 1 | 12 | V | 3 | ||
| Output current, N-channel (VOUT=0.5 V) | IOUT | 0.75 | 1.5 | mA | Output transistor N-channel, VOUT=0.5 V, VDD=1.2 V, MD6127C22~60 row | 3 | |
| Output current, P-channel (CMOS output only) | IOUT | 1 | 2 | mA | CMOS output products only, output transistor P-channel, VDD−VOUT=0.5 V, VDD=4.8 V, MD6127C22~39 row | 3 | |
| Leakage current (N-channel open-drain) | ILEAK | 0.1 | μA | N-channel open-drain products only, VDD=10 V, VOUT=10 V | 3 | ||
| Detection voltage temperature coefficient | △(-VDET)/△Ta | 120 | 360 | ppm/℃ | Ta=−40°C ∼ +85°C; printed as ±120 typ and ±360 max | 3 | |
| Delay time 1 (DS low) | Td1 | 130 | 200 | 290 | ms | VDD=−VDET+1 V, DS terminal low level | 3 |
| Delay time 2 (DS high) | Td2 | 110 | 220 | 330 | μs | VDD=−VDET+1 V, DS terminal high level | 3 |
| DS input high voltage | VSH | 1 | V | DS terminal, VDD=6.0 V | 3 | ||
| DS input low voltage | VSL | 0.3 | V | DS terminal, VDD=6.0 V | 3 | ||
| Supply voltage VDD−VSS (absolute maximum) | VDD-VSS | 15 | V | 2 | |||
| Output voltage, NMOS open-drain (absolute maximum) | VOUT | -0.3 | 15 | V | Referenced to VSS (VSS−0.3 to VSS+15 V) | 2 | |
| Output voltage, CMOS output (absolute maximum) | VOUT | -0.3 | 0.3 | V | Min referenced to VSS (VSS−0.3 V); max referenced to VDD (VDD+0.3 V) | 2 | |
| Output current (absolute maximum) | IOUT | 50 | mA | 2 | |||
| Allowable power dissipation, SOT23-5 | PD | 250 | mW | SOT23-5 package | 2 | ||
| Operating ambient temperature range | Topr | -40 | 85 | ℃ | 2 | ||
| Storage ambient temperature range | Tstg | -40 | 125 | ℃ | 2 |
CAD (KiCad official)
- Symbol:
MD6127C24 - Footprint:
Package_TO_SOT_SMD:SOT-23-5 - 3D model: SOT-23-5 (KiCad packages3D, STEP)
- 3D model files:
md6127c24-etched.step/md6127c24-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);md6127c24.step/md6127c24.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Shanghai Mingda Microelectronics datasheet (8 pp, sha256
d357fb103061ea1a, retrieved 2026-10-30, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# MD6127C24
**Shanghai Mingda Microelectronics** · Linear Voltage Regulators (LDO) · SOT-23-5
MD6127C24 from Shanghai Mingda Microelectronics, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | DS | input | Delay-time ON/OFF select input that must be fixed at a low or high level; a high level shortens the release delay to about 110-330 µs (versus about 130-290 ms at low), with VSH ≥ 1.0 V and VSL ≤ 0.3 V at VDD = 6.0 V. |
| 2 | VSS | power_in | Ground terminal, the reference for the supply and output levels (VDD − VSS absolute maximum rating is 15 V). |
| 3 | NC | unconnected | No connection; the pin is not connected internally and is not used in the circuit. |
| 4 | VOUT | output | Voltage detection output: NMOS open-drain output rated VSS−0.3 V to VSS+15 V, CMOS output rated VSS−0.3 V to VDD+0.3 V, with output current absolute maximum 50 mA. |
| 5 | VDD | power_in | Detection voltage input and supply, with operating voltage range 1 V to 12 V and absolute maximum VDD − VSS of 15 V. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Shanghai Mingda Microelectronics |
| Package | SOT-23-5 |
| Category | Power Management ICs |
| Pins | 5 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Detection voltage accuracy | -VDET | -2 | | 2 | % | Printed as ±2% accuracy in product table and features | 1 |
| Hysteresis width | VHYS | 30 | 60 | 100 | mV | | 3 |
| Supply current | Iss | | 1.1 | 5 | μA | VDD=3.5V, MD6127C22~26 row | 3 |
| Operating voltage | VDD | 1 | | 12 | V | | 3 |
| Output current, N-channel (VOUT=0.5 V) | IOUT | 0.75 | 1.5 | | mA | Output transistor N-channel, VOUT=0.5 V, VDD=1.2 V, MD6127C22~60 row | 3 |
| Output current, P-channel (CMOS output only) | IOUT | 1 | 2 | | mA | CMOS output products only, output transistor P-channel, VDD−VOUT=0.5 V, VDD=4.8 V, MD6127C22~39 row | 3 |
| Leakage current (N-channel open-drain) | ILEAK | | | 0.1 | μA | N-channel open-drain products only, VDD=10 V, VOUT=10 V | 3 |
| Detection voltage temperature coefficient | △(-VDET)/△Ta | | 120 | 360 | ppm/℃ | Ta=−40°C ∼ +85°C; printed as ±120 typ and ±360 max | 3 |
| Delay time 1 (DS low) | Td1 | 130 | 200 | 290 | ms | VDD=−VDET+1 V, DS terminal low level | 3 |
| Delay time 2 (DS high) | Td2 | 110 | 220 | 330 | μs | VDD=−VDET+1 V, DS terminal high level | 3 |
| DS input high voltage | VSH | 1 | | | V | DS terminal, VDD=6.0 V | 3 |
| DS input low voltage | VSL | | | 0.3 | V | DS terminal, VDD=6.0 V | 3 |
| Supply voltage VDD−VSS (absolute maximum) | VDD-VSS | | | 15 | V | | 2 |
| Output voltage, NMOS open-drain (absolute maximum) | VOUT | -0.3 | | 15 | V | Referenced to VSS (VSS−0.3 to VSS+15 V) | 2 |
| Output voltage, CMOS output (absolute maximum) | VOUT | -0.3 | | 0.3 | V | Min referenced to VSS (VSS−0.3 V); max referenced to VDD (VDD+0.3 V) | 2 |
| Output current (absolute maximum) | IOUT | | | 50 | mA | | 2 |
| Allowable power dissipation, SOT23-5 | PD | | | 250 | mW | SOT23-5 package | 2 |
| Operating ambient temperature range | Topr | -40 | | 85 | ℃ | | 2 |
| Storage ambient temperature range | Tstg | -40 | | 125 | ℃ | | 2 |
## CAD (KiCad official)
- Symbol: `MD6127C24`
- Footprint: `Package_TO_SOT_SMD:SOT-23-5`
- 3D model: SOT-23-5 (KiCad packages3D, STEP)
- 3D model files: `md6127c24-etched.step` / `md6127c24-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `md6127c24.step` / `md6127c24.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Shanghai Mingda Microelectronics datasheet](docs/md6127c24-datasheet.pdf) (8 pp, sha256 `d357fb103061ea1a`, retrieved 2026-10-30, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/md6127c24-datasheet.pdf)