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MCP73871T-2CCI
Public Made by Adomby adom
Microchip Tech Battery Management, QFN-20-EP(4x4). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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MCP73871T-2CCI
Microchip Tech · Battery Management · QFN-20-EP(4x4)
MCP73871T-2CCI from Microchip Tech, in a QFN-20-EP(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OUT | power_out | System output terminal that powers the system while the battery charges independently; bypass to VSS with a minimum of 4.7 µF is recommended. |
| 2 | VPCC | input | Voltage proportional charge control input; supply 1.23V or greater to enable the feature, or connect it to IN to disable it. |
| 3 | SEL | input | Input source type selection: low selects the USB port input, high selects the AC-DC adapter input. |
| 4 | PROG2 | input | USB-port input current limit selection when SEL is low: low = 100 mA, high = 500 mA. |
| 5 | THERM | bidirectional | Thermistor monitoring input and bias current for battery cell temperature monitoring. |
| 6 | PG | output | Power Good status output, open-drain; low whenever the input is above the UVLO threshold and greater than the battery voltage. |
| 7 | STAT2 | output | Charge status output 2, open-drain, for an LED or a pull-up to a host microcontroller. |
| 8 | STAT1/LBO | output | Charge status output 1, open-drain; acts as the low battery output indicator when VBAT > VIN. |
| 9 | TE | input | Timer enable input; enables the safety timer when active-low. |
| 10 | VSS | power_in | Battery management 0V reference; connect to the battery negative terminal, system load and input supply, and to the same potential as EP on the PCB. |
| 11 | VSS | power_in | Battery management 0V reference; connect to the battery negative terminal, system load and input supply, and to the same potential as EP on the PCB. |
| 12 | PROG3 | bidirectional | Termination set point for both the AC-DC adapter and USB port input. |
| 13 | PROG1 | bidirectional | Fast charge current regulation setting when SEL is high; also the preconditioning set point for both USB port and AC-DC adapter; the maximum constant charge current is set by a resistor from PROG1 to VSS. |
| 14 | VBAT | power_in | Battery positive input and output connection; bypass to VSS with a minimum of 4.7 µF for loop stability when the battery is disconnected. |
| 15 | VBAT | power_in | Battery positive input and output connection; bypass to VSS with a minimum of 4.7 µF for loop stability when the battery is disconnected. |
| 16 | VBAT_SENSE | bidirectional | Battery voltage sense; connect to the positive battery terminal, where a precision internal sense regulates the final voltage to VREG. |
| 17 | CE | input | Device charge enable; charging is enabled when CE is high, and the input must not be left floating. |
| 18 | IN | power_in | Power supply input; a supply of VREG + 0.3V to 6V is recommended, bypassed to VSS with a minimum of 4.7 µF. |
| 19 | IN | power_in | Power supply input; a supply of VREG + 0.3V to 6V is recommended, bypassed to VSS with a minimum of 4.7 µF. |
| 20 | OUT | power_out | System output terminal that powers the system while the battery charges independently; bypass to VSS with a minimum of 4.7 µF is recommended. |
| 21 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | QFN-20-EP(4x4) |
| Category | Power Management (PMIC) |
| Pins | 21 |
CAD (KiCad official)
- Symbol:
MCP73871T-2CCI - Footprint:
Package_DFN_QFN:QFN-20-1EP_4x4mm_P0.5mm_EP2.5x2.5mm - 3D model: QFN-20-EP(4x4) (KiCad packages3D, STEP)
- 3D model files:
mcp73871t-2cci-etched.step/mcp73871t-2cci-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);mcp73871t-2cci.step/mcp73871t-2cci.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Microchip Tech datasheet (40 pp, sha256
13e2e4e9e41f5b5b, retrieved 2026-10-09, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# MCP73871T-2CCI
**Microchip Tech** · Battery Management · QFN-20-EP(4x4)
MCP73871T-2CCI from Microchip Tech, in a QFN-20-EP(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OUT | power_out | System output terminal that powers the system while the battery charges independently; bypass to VSS with a minimum of 4.7 µF is recommended. |
| 2 | VPCC | input | Voltage proportional charge control input; supply 1.23V or greater to enable the feature, or connect it to IN to disable it. |
| 3 | SEL | input | Input source type selection: low selects the USB port input, high selects the AC-DC adapter input. |
| 4 | PROG2 | input | USB-port input current limit selection when SEL is low: low = 100 mA, high = 500 mA. |
| 5 | THERM | bidirectional | Thermistor monitoring input and bias current for battery cell temperature monitoring. |
| 6 | PG | output | Power Good status output, open-drain; low whenever the input is above the UVLO threshold and greater than the battery voltage. |
| 7 | STAT2 | output | Charge status output 2, open-drain, for an LED or a pull-up to a host microcontroller. |
| 8 | STAT1/LBO | output | Charge status output 1, open-drain; acts as the low battery output indicator when VBAT > VIN. |
| 9 | TE | input | Timer enable input; enables the safety timer when active-low. |
| 10 | VSS | power_in | Battery management 0V reference; connect to the battery negative terminal, system load and input supply, and to the same potential as EP on the PCB. |
| 11 | VSS | power_in | Battery management 0V reference; connect to the battery negative terminal, system load and input supply, and to the same potential as EP on the PCB. |
| 12 | PROG3 | bidirectional | Termination set point for both the AC-DC adapter and USB port input. |
| 13 | PROG1 | bidirectional | Fast charge current regulation setting when SEL is high; also the preconditioning set point for both USB port and AC-DC adapter; the maximum constant charge current is set by a resistor from PROG1 to VSS. |
| 14 | VBAT | power_in | Battery positive input and output connection; bypass to VSS with a minimum of 4.7 µF for loop stability when the battery is disconnected. |
| 15 | VBAT | power_in | Battery positive input and output connection; bypass to VSS with a minimum of 4.7 µF for loop stability when the battery is disconnected. |
| 16 | VBAT_SENSE | bidirectional | Battery voltage sense; connect to the positive battery terminal, where a precision internal sense regulates the final voltage to VREG. |
| 17 | CE | input | Device charge enable; charging is enabled when CE is high, and the input must not be left floating. |
| 18 | IN | power_in | Power supply input; a supply of VREG + 0.3V to 6V is recommended, bypassed to VSS with a minimum of 4.7 µF. |
| 19 | IN | power_in | Power supply input; a supply of VREG + 0.3V to 6V is recommended, bypassed to VSS with a minimum of 4.7 µF. |
| 20 | OUT | power_out | System output terminal that powers the system while the battery charges independently; bypass to VSS with a minimum of 4.7 µF is recommended. |
| 21 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | QFN-20-EP(4x4) |
| Category | Power Management (PMIC) |
| Pins | 21 |
## CAD (KiCad official)
- Symbol: `MCP73871T-2CCI`
- Footprint: `Package_DFN_QFN:QFN-20-1EP_4x4mm_P0.5mm_EP2.5x2.5mm`
- 3D model: QFN-20-EP(4x4) (KiCad packages3D, STEP)
- 3D model files: `mcp73871t-2cci-etched.step` / `mcp73871t-2cci-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `mcp73871t-2cci.step` / `mcp73871t-2cci.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Microchip Tech datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588912739641540608) (40 pp, sha256 `13e2e4e9e41f5b5b`, retrieved 2026-10-09, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/mcp73871t-2cci-datasheet.pdf)