component

MCP73811T-420I

Public Made by Adom

by adom

Microchip Tech Battery Management, SOT-23-5. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentpower management (pmic)mcp73811t-420ifactory-2.0.0extractor-text
Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity
main
Download ZIP Propose a change
Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 14d ago
viewers mcp73811t-420i: viewers · Ray 14d ago
mcp73811t-420i-etched.glb Publish 0.1.0 · Ray 14d ago
mcp73811t-420i-etched.step mcp73811t-420i: factory component page (tier=lcsc) · Ray 14d ago
mcp73811t-420i-hero.glb mcp73811t-420i: hero GLB from the etched model (keeps the MPN mark) · Ray 14d ago
mcp73811t-420i-hero.overlay.json Publish 0.1.0 · Ray 14d ago
mcp73811t-420i.glb Publish 0.1.0 · Ray 14d ago
mcp73811t-420i.kicad_mod Publish 0.1.0 · Ray 14d ago
mcp73811t-420i.kicad_sym Publish 0.1.0 · Ray 14d ago
mcp73811t-420i.lbr Publish 0.1.0 · Ray 14d ago
mcp73811t-420i.step Publish 0.1.0 · Ray 14d ago
package.json Publish 0.1.0 · Ray 14d ago
page.json Set visibility: public · Ray 14d ago
README.md Publish 0.1.0 · Ray 14d ago

MCP73811T-420I

Microchip Tech · Battery Management · SOT-23-5

MCP73811T-420I from Microchip Tech, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 CE input Active-high charge enable: a logic High enables battery charging and a logic Low disables it; the input is compatible with 1.8V logic.
2 VSS power_in Battery management 0V reference, connected to the negative terminal of the battery and the input supply.
3 VBAT power_out Battery charge control output, the drain of the internal P-channel pass MOSFET; connect to the battery positive terminal and bypass to VSS with at least 1 µF for loop stability when the battery is disconnected.
4 VDD power_in Battery management input supply, recommended at [VREG(typ.) + 0.3V] to 6V and bypassed to VSS with at least 1 µF.
5 PROG input Current regulation set and charge control enable: for the MCP73811 a logic Low selects 85 mA and a logic High selects 450 mA, while for the MCP73812 a programming resistor from PROG to VSS sets the charge current (2 kΩ to 20 kΩ).

Key specifications

Parameter Value
Manufacturer Microchip Tech
Package SOT-23-5
Category Power Management (PMIC)
Pins 5

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply Voltage VDD 3.75 6 V 3
Supply Current, charging ISS 1000 1500 µA Charging 3
Supply Current, standby ISS 50 100 µA Standby (CE = VSS) 3
Supply Current, shutdown ISS 1.2 5 µA Shutdown (VDD < VBAT - 100 mV) 3
Output Voltage Tolerance VRTOL -1 1 % TA=-5°C to +55°C 3
Line Regulation /(ΔVBAT/VBAT)/ΔVDD/ 0.09 0.3 %/V VDD=[VREG(Typ)+1V] to 6V, IOUT=10 mA 3
Load Regulation /ΔVBAT/VBAT/ 0.09 0.3 % IOUT=10 mA to 50 mA, VDD=[VREG(Typ)+1V] 3
Charge Current Tolerance IRTOL -10 10 % TA=-5°C to +55°C 3
Output Reverse Leakage Current (battery discharge) IDISCHARGE 0.5 2 µA Shutdown (VDD < VBAT - 100 mV) 3
Input High Voltage Level (CE, PROG - MCP73811) VIH 2 V 4
Input Low Voltage Level (CE, PROG - MCP73811) VIL 0.8 V 4
Input Leakage Current (CE, PROG - MCP73811) ILK 0.01 1 µA VCE = VDD, VPROG = VDD 4
Specified Temperature Range TA -40 85 °C 4
Operating Temperature Range TJ -40 125 °C 4
Storage Temperature Range TA -65 150 °C 4
Supply Voltage (absolute maximum) VDDN 7 V 3
All Inputs and Outputs w.r.t. VSS (absolute maximum, lower bound) -0.3 V w.r.t. VSS 3
ESD protection, Human Body Model 4 kV Human Body Model (1.5 kW in Series with 100 pF) 3
Thermal Resistance, 5-Lead SOT-23 θJA 230 °C/W 4-Layer JC51-7 Standard Board, Natural Convection 4

CAD (KiCad official)

  • Symbol: MCP73811T-420I
  • Footprint: Package_TO_SOT_SMD:SOT-23-5
  • 3D model: SOT-23-5 (KiCad packages3D, STEP)
  • 3D model files: mcp73811t-420i-etched.step / mcp73811t-420i-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); mcp73811t-420i.step / mcp73811t-420i.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Microchip Tech datasheet (22 pp, sha256 1acfbc5a2b1e928e, retrieved 2026-10-20, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF