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MCP73223T-C2SI

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Microchip Tech Battery Management ICs, TDFN-10-EP(3x3). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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MCP73223T-C2SI

Microchip Tech · Battery Management ICs · TDFN-10-EP(3x3)

MCP73223T-C2SI from Microchip Tech, in a TDFN-10-EP(3x3). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VDD power_in Battery management input supply; recommended [VREG(typ)+0.3V] to 12.0V for MCP73223, bypass to VSS with at least 1 µF, rated 18V absolute maximum.
2 VDD power_in Battery management input supply; recommended [VREG(typ)+0.3V] to 12.0V for MCP73223, bypass to VSS with at least 1 µF, rated 18V absolute maximum.
3 VBAT power_in Battery charge control output connected to the positive battery terminal, bypassed to VSS with at least 1 µF for loop stability when the battery is disconnected.
4 VBAT power_in Battery charge control output connected to the positive battery terminal, bypassed to VSS with at least 1 µF for loop stability when the battery is disconnected.
5 NC unconnected No connection.
6 NC unconnected No connection.
7 STAT output Open-drain battery charge status output for an LED or a pull-up resistor to a host microcontroller.
8 VSS power_in Battery management 0V reference, connected to the negative terminal of the battery and input supply.
9 VSS power_in Battery management 0V reference, connected to the negative terminal of the battery and input supply.
10 PROG bidirectional Fast charge current set by a resistor to VSS and charge enable; floating or an impedance above 200 kΩ disables the charger.
11 EP passive Exposed thermal pad connected to PCB copper for heat dissipation; connecting to VSS is recommended.

Key specifications

Parameter Value
Manufacturer Microchip Tech
Package TDFN-10-EP(3x3)
Category Power Supply Chip
Pins 11

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
PROG voltage VPROG 6 V 4
All inputs and outputs w.r.t. VSS -0.3 V to (VDD+0.3)V 4
Storage temperature -65 150 °C 4
ESD protection HBM 4 kV Human Body Model (1.5 kΩ in series with 100 pF) 4
Input Voltage Range VDD 4 16 V 4
Operating Supply Voltage VDD 4.2 13 V MCP73223 4
Supply Current ISS 4 5.5 µA Shutdown (VDD ≤ VBAT - 150 mV) 4
Supply Current ISS 700 1500 µA Charging 4
Supply Current ISS 30 100 µA Standby (PROG Floating) 4
Supply Current ISS 50 150 µA Charge Complete; No Battery; VDD ≤ VSTOP 4
Battery Discharge Current IDISCHARGE 0.5 2 µA Standby (PROG Floating) 4
Battery Discharge Current IDISCHARGE 6 17 µA Charge Complete; VDD is present 4
UVLO Start Threshold VSTART 4.1 4.15 4.25 V 4
UVLO Stop Threshold VSTOP 4 4.05 4.15 V 4
OVP Start Threshold VOVP 12.8 13 13.2 V MCP73223 4
Regulated Output Voltage VREG 7.157 7.2 7.243 V TA= -5°C to +55°C, IOUT = 50 mA - MCP73223 4
Output Voltage Tolerance VRTOL -0.6 0.6 % TA= -5°C to +55°C - MCP73223 4
Line Regulation ΔVBAT/VBAT)/ΔVDD 0.05 0.2 %/V VDD = [VREG(Typical)+1V] to 12V - MCP73223, IOUT = 50 mA 5
Load Regulation ΔVBAT/VBAT 0.05 0.2 % IOUT = 50 mA - 150 mA, VDD = [VREG(Typical)+1V] 5
Fast Charge Current Regulation IREG 130 1100 mA TA=-5°C to +55°C 5
Precondition Voltage Threshold VPTH 3.8 4 4.2 V MCP73223, VBAT Low-to-High 5
Charge Termination Current Ratio ITERM/IREG 7.5 10 12.5 % PROG = 1 kΩ to 10 kΩ, TA=-5°C to +55°C 5
Recharge Voltage Threshold Ratio VRTH/VREG 93 95 97 % VBAT High-to-Low 5
Status Sink Current ISINK 20 35 mA 5
Status Low Output Voltage VOL 0.2 0.5 V ISINK = 4 mA 5
Status Input Leakage Current ILK 0.001 1 µA High Impedance, VDD on pin 5
PROG Charge Impedance Range RPROG 1 10 kΩ 5
PROG Voltage Range VPROG 0 5 V 5
Automatic Power Down Entry Threshold (offset above VBAT) VPDENTRY 10 50 mV VDD Falling; printed as VBAT + 10 mV (min), VBAT + 50 mV (typ) 6
Automatic Power Down Exit Threshold (offset above VBAT) VPDEXIT 150 250 mV VDD Rising; printed as VBAT + 150 mV (typ), VBAT + 250 mV (max) 6
Elapsed Timer Period tELAPSED 5.4 6 6.6 Hours 6
Preconditioning Timer Period tPRECHG 0.4 0.5 0.6 Hours 6
Status Output turn-off tOFF 500 µs ISINK = 1 mA to 0 mA (Note 1) 6
Status Output turn-on tON 500 µs ISINK = 0 mA to 1 mA (Note 1) 6
Specified Temperature Range TA -40 85 °C 6
Operating Temperature Range TJ -40 125 °C 6
Storage Temperature Range TA -65 150 °C 6
UVLO Hysteresis VHYS 100 mV 4
OVP Hysteresis VOVPHYS 150 mV 4
Supply Ripple Attenuation PSRR -46 dB IOUT = 20 mA, 10 Hz to 1 kHz 5
Supply Ripple Attenuation PSRR -30 dB IOUT = 20 mA, 10 Hz to 10 kHz 5
BSP Start Threshold VSHORT 2.9 V MCP73223 5
BSP Hysteresis VBSPHYS 150 mV 5
BSP Regulation Current ISHORT 25 mA 5
Fast Charge Current Regulation IREG 130 mA PROG = 10 kΩ 5
Fast Charge Current Regulation IREG 1000 mA PROG = 1.1 kΩ 5
Precondition Current Ratio IPREG/IREG 10 % PROG = 1 kΩ to 10 kΩ, TA=-5°C to +55°C 5
Precondition Hysteresis VPHYS 100 mV VBAT High-to-Low (Note 1) 5
Pass Transistor ON-Resistance RDSON 350 mΩ VDD = 4.5V, TJ = 105°C (Note 1) 5
PROG Shutdown Impedance RPROG 200 kΩ Impedance for Shutdown 5
Thermal Shutdown Die Temperature TSD 150 °C 6
Die Temperature Hysteresis TSDHYS 10 °C 6
Thermal Resistance, DFN-10 (3x3) junction to ambient θJA 64 °C/W 4-Layer JC51-7 Standard Board, Natural Convection 6
Thermal Resistance, DFN-10 (3x3) junction to case θJC 12 °C/W 4-Layer JC51-7 Standard Board, Natural Convection 6

CAD (KiCad official)

  • Symbol: MCP73223T-C2SI
  • Footprint: Package_DFN_QFN:DFN-10-1EP_3x3mm_P0.5mm_EP1.55x2.48mm
  • 3D model: TDFN-10-EP(3x3) (KiCad packages3D, STEP)
  • 3D model files: mcp73223t-c2si-etched.step / mcp73223t-c2si-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); mcp73223t-c2si.step / mcp73223t-c2si.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Microchip Tech datasheet (28 pp, sha256 66627536b12fd6ad, retrieved 2026-10-23, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF