# MCP6V72-E

**Microchip Tech** · Operational Amplifier · MSOP-8

MCP6V72-E from Microchip Tech, in a MSOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VOUTA | output | Output of op amp A, a low-impedance voltage source. |
| 2 | VINA- | input | Inverting input of op amp A, a high-impedance CMOS input with low bias current. |
| 3 | VINA+ | input | Noninverting input of op amp A, a high-impedance CMOS input with low bias current. |
| 4 | VSS | power_in | Negative power supply; usually connected to ground in single-supply use, with VDD 2V to 5.5V higher. |
| 5 | VINB+ | input | Noninverting input of op amp B, a high-impedance CMOS input with low bias current. |
| 6 | VINB- | input | Inverting input of op amp B, a high-impedance CMOS input with low bias current. |
| 7 | VOUTB | output | Output of op amp B, a low-impedance voltage source. |
| 8 | VDD | power_in | Positive power supply, 2V to 5.5V higher than VSS, needing bypass capacitors. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | MSOP-8 |
| Category | Operational Amplifier/Comparator |
| Pins | 8 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input Offset Voltage | VOS | -8 |  | 8 | µV | TA = +25°C | 3 |
| Input Offset Voltage Drift (linear TC) | TC1 | -30 |  | 30 | nV/°C | TA = -40 to +125°C, VDD = 2V (Note 1) | 3 |
| Input Offset Voltage Drift (linear TC) | TC1 | -15 |  | 15 | nV/°C | TA = -40 to +125°C, VDD = 5.5V (Note 1) | 3 |
| Power Supply Rejection Ratio | PSRR | 115 | 125 |  | dB |  | 3 |
| Input Bias Current | IB | -50 | 1 | 50 | pA | typ printed as ±1 | 4 |
| Input Bias Current across Temperature | IB | 0 | 0.2 | 1.5 | nA | TA = +125°C (Note 3) | 4 |
| Input Offset Current | IOS | -250 | 60 | 250 | pA | typ printed as ±60 | 4 |
| Input Offset Current across Temperature | IOS | -800 | 50 | 800 | pA | TA = +125°C (Note 4); typ printed as ±50 | 4 |
| Common-Mode Rejection Ratio | CMRR | 111 | 122 |  | dB | VDD = 2V, VCM = -0.2V to 2.3V (Note 2) | 4 |
| Common-Mode Rejection Ratio | CMRR | 117 | 130 |  | dB | VDD = 5.5V, VCM = -0.2V to 5.8V (Note 2) | 4 |
| DC Open-Loop Gain | AOL | 117 | 132 |  | dB | VDD = 2V, VOUT = 0.3V to 1.8V | 4 |
| DC Open-Loop Gain | AOL | 126 | 137 |  | dB | VDD = 5.5V, VOUT = 0.3V to 5.3V | 4 |
| Supply Voltage | VDD | 2 |  | 5.5 | V |  | 4 |
| Quiescent Current per Amplifier | IQ | 100 | 170 | 260 | µA | IO = 0 | 4 |
| POR Trip Voltage | VPOR | 0.9 | 1.2 | 1.6 | V |  | 4 |
| Specified Temperature Range | TA | -40 |  | 125 | °C |  | 5 |
| Operating Temperature Range | TA | -40 |  | 125 | °C | Note 1 | 5 |
| Storage Temperature Range | TA | -65 |  | 150 | °C |  | 5 |
| Current at Input Pins |  | -2 |  | 2 | mA | printed ±2 mA | 3 |
| Current at Output and Supply Pins |  | -30 |  | 30 | mA | printed ±30 mA | 3 |
| Storage Temperature |  | -65 |  | 150 | °C |  | 3 |
| Maximum Junction Temperature | TJ |  |  | 150 | °C |  | 3 |
| ESD protection HBM |  |  |  | 4 | kV | MCP6V72/4, all pins | 3 |
| ESD protection CDM |  |  |  | 1.5 | kV | MCP6V72/4, all pins | 3 |
| ESD protection MM |  |  |  | 300 | V | MCP6V72/4, all pins | 3 |
| Thermal Resistance, 8L-MSOP | θJA |  | 211 |  | °C/W |  | 5 |
| Input Offset Voltage Quadratic Temperature Coefficient | TC2 |  | -30 |  | pV/°C2 | TA = -40 to +125°C, VDD = 2V | 3 |
| Input Offset Voltage Quadratic Temperature Coefficient | TC2 |  | -6 |  | pV/°C2 | TA = -40 to +125°C, VDD = 5.5V (Note 1) | 3 |
| Output Short-Circuit Current | ISC |  | 9 |  | mA | VDD = 2V; printed ±9 | 4 |
| Output Short-Circuit Current | ISC |  | 26 |  | mA | VDD = 5.5V; printed ±26 | 4 |
| Gain Bandwidth Product | GBWP |  | 2 |  | MHz |  | 5 |
| Slew Rate | SR |  | 1 |  | V/µs |  | 5 |
| Phase Margin | PM |  | 60 |  | ° | G = +1 | 5 |
| Input Noise Voltage | Eni |  | 0.45 |  | µVP-P | f = 0.1 Hz to 10 Hz | 5 |
| Input Noise Voltage Density | eni |  | 21 |  | nV/√Hz | f < 2 kHz | 5 |

## Materials and finish

As the datasheet states them (page.json `metadata.appearance`; the 3D model's colours follow it).

| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts |  | gold | 14-lead *Y = Nickel palladium gold manufacturing designator. | 49 |

## CAD (KiCad official)

- Symbol: `MCP6V72-E`
- Footprint: `Package_SO:MSOP-8_3x3mm_P0.65mm`
- 3D model: MSOP-8 (KiCad packages3D, STEP)
- 3D model files: `mcp6v72-e-etched.step` / `mcp6v72-e-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `mcp6v72-e.step` / `mcp6v72-e.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Microchip Tech datasheet](docs/mcp6v72-e-datasheet.pdf) (52 pp, sha256 `5b77f520d3d2284a`, retrieved 2026-10-30, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/mcp6v72-e-datasheet.pdf)