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MCP6V51T-E
Public Made by Adomby adom
Microchip Tech Precision Op Amps, SOT-23-5. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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Contents
README
markdownMCP6V51T-E
Microchip Tech · Precision Op Amps · SOT-23-5
MCP6V51T-E from Microchip Tech, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VOUT | output | Analog output is a low-impedance voltage source. |
| 2 | VSS | power_in | Negative power supply; VDD is 4.5V to 45V higher than VSS, and VSS is connected to ground in single-supply use. |
| 3 | VIN+ | power_in | Noninverting input is a high-impedance CMOS input with low bias currents, and normal operation requires the input to stay between VSS and VDD. |
| 4 | VIN- | power_in | Inverting input is a high-impedance CMOS input with low bias currents, and normal operation requires the input to stay between VSS and VDD. |
| 5 | VDD | power_in | Positive power supply, 4.5V to 45V higher than VSS, which needs bypass capacitors. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | SOT-23-5 |
| Category | Amplifiers/Comparators |
| Pins | 5 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input Offset Voltage | VOS | -15 | 2.4 | 15 | µV | TA = +25°C | 3 |
| Input Offset Voltage Drift with Temperature (Linear Temp. Co.), VDD = 4.5V | TC1 | -31 | 5 | 31 | nV/°C | TA = -40 to +125°C, VDD = 4.5V (Note 1) | 3 |
| Input Offset Voltage Drift with Temperature (Linear Temp. Co.), VDD = 45V | TC1 | -36 | 7 | 36 | nV/°C | TA = -40 to +125°C, VDD = 45V (Note 1) | 3 |
| Power Supply Rejection Ratio | PSRR | 134 | 160 | dB | 3 | ||
| Power Supply Rejection Ratio (temperature) | PSRR | 124 | 138 | dB | TA = -40°C to +125°C, VDD = 45V (Note 1) | 3 | |
| Input Bias Current | IB | -250 | 60 | 250 | pA | VDD = 45V | 4 |
| Input Bias Current across Temperature | IB | -4 | 1.4 | 4 | nA | TA = +125°C (Note 1) | 4 |
| Input Offset Current | IOS | -1 | 0.28 | 1 | nA | VDD = 45V | 4 |
| Input Offset Current across Temperature | IOS | -8 | 0.45 | 8 | nA | TA = +125°C (Note 1) | 4 |
| Common-Mode Input Voltage Range Low (max = VSS, 0.3 V, reference VSS) | VCML | -0.3 | V | Note 2 | 4 | ||
| Common-Mode Input Voltage Range High (min = VDD, 2.1 V, reference VDD) | VCMH | -2.1 | V | Note 2 | 4 | ||
| Common-Mode Rejection Ratio | CMRR | 110 | 125 | dB | VDD = 4.5V, VCM = -0.3V to 2.4V (Note 2) | 4 | |
| Common-Mode Rejection Ratio (temperature) | CMRR | 106 | 116 | dB | VDD = 4.5V, TA = -40°C to +125°C (Note 1) | 4 | |
| Common-Mode Rejection Ratio | CMRR | 135 | 150 | dB | VDD = 45V, VCM = -0.3V to 42.9V (Note 2) | 4 | |
| Common-Mode Rejection Ratio (temperature) | CMRR | 128 | 140 | dB | VDD = 45V, TA = -40°C to +125°C (Note 1) | 4 | |
| DC Open-Loop Gain | AOL | 124 | 142 | dB | VDD = 4.5V, VOUT = 0.3V to 4.2V | 4 | |
| DC Open-Loop Gain (temperature) | AOL | 120 | 139 | dB | VDD = 4.5V, TA = -40°C to +125°C (Note 1) | 4 | |
| DC Open-Loop Gain | AOL | 140 | 164 | dB | VDD = 45V, VOUT = 0.3V to 44.7V | 4 | |
| DC Open-Loop Gain (temperature) | AOL | 134 | 160 | dB | VDD = 45V, TA = -40°C to +125°C (Note 1) | 4 | |
| Minimum Output Voltage Swing (typ = VSS + 45, max = VSS + 60; reference VSS) | VOL | 45 | 60 | mV | RL = 1 kΩ, VDD = 4.5V | 5 | |
| Minimum Output Voltage Swing (typ = VSS + 500, max = VSS + 1000; reference VSS) | VOL | 500 | 1000 | mV | RL = 1 kΩ, VDD = 45V | 5 | |
| Minimum Output Voltage Swing (typ = VSS + 6, max = VSS + 20; reference VSS) | VOL | 6 | 20 | mV | RL = 10 kΩ, VDD = 4.5V | 5 | |
| Minimum Output Voltage Swing (typ = VSS + 50, max = VSS + 70; reference VSS) | VOL | 50 | 70 | mV | RL = 10 kΩ, VDD = 45V | 5 | |
| Maximum Output Voltage Swing (min = VDD, 150, typ = VDD, 100; reference VDD) | VOH | -150 | -100 | mV | RL = 1 kΩ, VDD = 4.5V | 5 | |
| Maximum Output Voltage Swing (min = VDD, 2500, typ = VDD, 1500; reference VDD) | VOH | -2500 | -1500 | mV | RL = 1 kΩ, VDD = 45V | 5 | |
| Maximum Output Voltage Swing (min = VDD, 20, typ = VDD, 12; reference VDD) | VOH | -20 | -12 | mV | RL = 10 kΩ, VDD = 4.5V | 5 | |
| Maximum Output Voltage Swing (min = VDD, 200, typ = VDD, 100; reference VDD) | VOH | -200 | -100 | mV | RL = 10 kΩ, VDD = 45V | 5 | |
| Supply Voltage | VDD | 4.5 | 45 | V | 5 | ||
| Quiescent Current per Amplifier | IQ | 310 | 460 | 590 | µA | VDD = 4.5V, IO = 0 | 5 |
| Quiescent Current per Amplifier | IQ | 310 | 470 | 590 | µA | VDD = 45V, IO = 0 | 5 |
| Quiescent Current per Amplifier across Temperature | IQ | 540 | 670 | µA | IO = 0, TA = -40 to +125°C, see Figure 2-22 (Note 1) | 5 | |
| Specified Temperature Range | TA | -40 | 125 | °C | 6 | ||
| Operating Temperature Range | TA | -40 | 125 | °C | Note 1 | 6 | |
| Storage Temperature Range | TA | -65 | 150 | °C | 6 | ||
| Current at Input Pins | -5 | 5 | mA | Note 1 | 3 | ||
| Analog Inputs (VIN+ and VIN-) (min = VSS, 0.5 V, max = VDD + 0.5 V; references VSS and VDD) | -0.5 | 0.5 | V | 3 | |||
| All Other Inputs and Outputs (min = VSS, 0.3 V, max = VDD + 0.3 V; references VSS and VDD) | -0.3 | 0.3 | V | 3 | |||
| Differential Input Voltage | -9 | 9 | V | Note 1 | 3 | ||
| Current at Output and Supply Pins | -50 | 50 | mA | 3 | |||
| Maximum Junction Temperature | 150 | °C | 3 | ||||
| ESD Protection on All Pins (HBM) | 2 | kV | 3 | ||||
| ESD Protection on All Pins (CDM) | 750 | V | 3 | ||||
| ESD Protection on All Pins (MM) | 200 | V | 3 | ||||
| Thermal Resistance, 5-Lead SOT-23, junction to ambient | θJA | 115 | °C/W | 6 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | tin | 8-Lead Plastic Small Outline (SN) - Narrow, 3.90 mm (.150 In.) Body [SOIC] A A2 | 38 |
CAD (KiCad official)
- Symbol:
MCP6V51T-E - Footprint:
Package_TO_SOT_SMD:SOT-23-5 - 3D model: SOT-23-5 (KiCad packages3D, STEP)
- 3D model files:
mcp6v51t-e-etched.step/mcp6v51t-e-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);mcp6v51t-e.step/mcp6v51t-e.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Microchip Tech datasheet (50 pp, sha256
6d2dd469007b537e, retrieved 2026-10-19, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).