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Contents

README

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MCP6S91T-E

Microchip Tech · Programmable/Variable Gain Amplifiers (PGAs/VGAs) · SOIC-8

MCP6S91T-E from Microchip Tech, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VOUT output Analog output, a low-impedance voltage source whose value is set by the selected gain, the selected input and the voltage at VREF.
2 CH0 input Analog input to the single-channel MUX, a high-impedance CMOS input with low bias current (input range VSS - 0.3V to VDD + 0.3V).
3 VREF power_in External reference analog input that shifts the output voltage and should be at a voltage between VSS and VDD.
4 VSS power_in Negative power supply, normally connected to ground in single-supply use.
5 CS input SPI chip select, a Schmitt-triggered CMOS logic input.
6 SI input SPI serial data input, a Schmitt-triggered CMOS logic input.
7 SCK input SPI clock input, a Schmitt-triggered CMOS logic input.
8 VDD power_in Positive power supply, 2.5V to 5.5V above VSS, needing a local 0.01 µF to 0.1 µF bypass capacitor within 2 mm of the pin.

Key specifications

Parameter Value
Manufacturer Microchip Tech
Package SOIC-8
Category Operational Amplifier/Comparator
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input Offset Voltage VOS -4 4 mV G = +1 2
Power Supply Rejection Ratio PSRR 70 90 dB G = +1 (Note 1) 2
Input Voltage Range VIVR -0.3 0.3 V VSS − 0.3 to VDD + 0.3 (Note 2) 2
Reference Voltage Range VIVR_REF 0 V VSS to VDD (Note 2) 2
DC Gain Error G = +1 gE -0.2 0.2 % VOUT ≈ 0.3V to VDD − 0.3V 2
DC Gain Error G ≥ +2 gE -1 1 % VOUT ≈ 0.3V to VDD − 0.3V 2
Ladder Resistance RLAD 3.4 4.9 6.4 kΩ (Note 1) 3
Supply Voltage VDD 2.5 5.5 V 3
Minimum Valid Supply Voltage VDD_VAL 0.4 2 V Register data still valid 3
Quiescent Current IQ 0.4 1 1.6 mA IO = 0 (Note 3) 3
Logic Threshold, Low VIL 0 V max 0.3VDD 5
Input Leakage Current IIL -1 1 µA 5
Amplifier Output Leakage Current -1 1 µA In Shutdown mode 5
CS High Time tCSH 40 ns 5
SCK Frequency fSCK 10 MHz VDD = 5V (Note 2) 5
Out of Shutdown Turn-on Time tON 3.5 10 µs CS = 0.7 VDD to VOUT 90% point 5
Specified Temperature Range TA -40 125 °C (Note 1) 6
Supply voltage VDD-VSS VDD-VSS 7 V 2
Junction temperature TJ 150 °C 2
Storage temperature Tstg -65 150 °C 2
Thermal Resistance, 8L-SOIC θJA 163 °C/W 6

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
contacts tin 8-Lead Plastic Small Outline (SN), Narrow, 150 mil (SOIC) Foot Angle φ 048048 33

CAD (KiCad official)

  • Symbol: MCP6S91T-E
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: mcp6s91t-e-etched.step / mcp6s91t-e-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); mcp6s91t-e.step / mcp6s91t-e.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Microchip Tech datasheet (40 pp, sha256 4ff68087eb19cd44, retrieved 2026-10-23, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF