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MCP6N11-005E
Public Made by Adomby adom
Microchip Tech Instrumentation Amplifiers, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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Contents
README
markdownMCP6N11-005E
Microchip Tech · Instrumentation Amplifiers · SOIC-8
MCP6N11-005E from Microchip Tech, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VFG | input | Analog feedback input, the inverting input of the second input stage, to which external feedback resistors RF and RG connect; it is a high-impedance CMOS input with low bias current. |
| 2 | VIM | input | Inverting analog signal input of the instrumentation amplifier, a high-impedance CMOS input with low bias currents. |
| 3 | VIP | input | Non-inverting analog signal input of the instrumentation amplifier, a high-impedance CMOS input with low bias currents. |
| 4 | VSS | power_in | Negative power supply; VDD must be 1.8V to 5.5V higher than VSS, and in single-supply use VSS is connected to ground while all other pins stay between VSS and VDD. |
| 5 | VREF | power_in | Analog reference input, the non-inverting input of the second input stage that shifts VOUT to its desired range; the external gain resistor RG connects here, and it is a high-impedance CMOS input with low bias current. |
| 6 | VOUT | output | Low-impedance analog output representing the differential input VDM = VIP - VIM multiplied by gain GDM and shifted by VREF; the external feedback resistor RF connects to this pin. |
| 7 | VDD | power_in | Positive power supply, 1.8V to 5.5V above VSS, which requires bypass capacitors. |
| 8 | EN/CAL | input | CMOS Schmitt-triggered digital input: driving it low places the part in low-power mode with the output high-Z, and driving it high runs VOS calibration and then reconnects VOUT to normal low-impedance operation. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | SOIC-8 |
| Category | Amplifiers/Comparators |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input Offset Voltage, Calibrated (GMIN = 5) | VOS | -0.85 | 0.85 | mV | 3 | ||
| Input Offset Voltage Drift (GMIN = 5, Max. per Table 1) | ΔVOS/ΔTA | -18 | 18 | µV/°C | TA= -40°C to +125°C | 2 | |
| Input Bias Current, across temperature | IB | 0 | 2 | 5 | nA | TA= +125°C | 4 |
| Input Offset Current, across temperature | IOS | -1 | 0.05 | 1 | nA | TA= +125°C | 4 |
| Power Supply Rejection Ratio (GMIN = 5) | PSRR | 75 | 96 | dB | 3 | ||
| Common Mode Rejection Ratio (GMIN = 5, VDD = 1.8V) | CMRR | 75 | 101 | dB | VCM = VIVL to VIVH, VDD = 1.8V | 4 | |
| Common Mode Rejection Ratio (GMIN = 5, VDD = 5.5V) | CMRR | 80 | 108 | dB | VCM = VIVL to VIVH, VDD = 5.5V | 4 | |
| Common Mode Non-Linearity (GMIN = 5, VDD = 1.8V) | INLCM | -230 | 11 | 230 | ppm | VCM = VIVL to VIVH, VDM = 0V, VDD = 1.8V (Note 7) | 4 |
| Common Mode Non-Linearity (GMIN = 5, VDD = 5.5V) | INLCM | -100 | 4 | 100 | ppm | VCM = VIVL to VIVH, VDM = 0V, VDD = 5.5V (Note 7) | 4 |
| Differential Input Voltage Range, maximum (GMIN = 5, per Table 1) | VDMH | 0.54 | V | 2 | |||
| Differential Gain Error | gE | -1 | 0.13 | 1 | % | VDM = VDML to VDMH, VREF = (VDD -GDMVDM)/2 | 5 |
| Differential Non-Linearity (GMIN = 5) | INLDM | -800 | 40 | 800 | ppm | 5 | |
| DC Open-Loop Gain (GMIN = 5, VDD = 1.8V) | AOL | 76 | 98 | dB | VDD = 1.8V, VOUT = 0.2V to 1.6V | 5 | |
| DC Open-Loop Gain (GMIN = 5, VDD = 5.5V) | AOL | 84 | 108 | dB | VDD = 5.5V, VOUT = 0.2V to 5.3V | 5 | |
| Gain Bandwidth Product (GMIN = 5, Max. per Table 1) | GBWP | 2.5 | MHz | 2 | |||
| Supply Voltage | VDD | 1.8 | 5.5 | V | 5 | ||
| Quiescent Current per Amplifier | IQ | 0.5 | 0.8 | 1.1 | mA | IO = 0 | 5 |
| POR Trip Voltage (falling) | VPRL | 1.1 | 1.4 | V | 5 | ||
| POR Trip Voltage (rising) | VPRH | 1.4 | 1.7 | V | 5 | ||
| GND Current, EN/CAL low | ISS | -7 | -2.5 | µA | EN/CAL = 0V, VDD = 5.5V | 7 | |
| EN/CAL Low to Amplifier Output High-Z Turn-off Time | tOFF | 3 | 10 | µs | EN/CAL = 0.2VDD to VOUT = 0.1(VDD/2), VDMGDM = 1 V, VL = 0V | 7 | |
| EN/CAL High to Amplifier Output On Time | tON | 12 | 20 | 28 | ms | EN/CAL = 0.8VDD to VOUT = 0.9(VDD/2), VDMGDM = 1 V, VL = 0V | 7 |
| EN/CAL Low to EN/CAL High low time | tENLH | 100 | µs | Minimum time before externally releasing EN/CAL (Note 1) | 7 | ||
| VDD Rising to Output On | tPLH | 140 | 250 | 360 | ms | VL = 0V, VDD = 0V to VPRH + 0.1V step, 90% of VOUT change | 7 |
| Specified Temperature Range | TA | -40 | 125 | °C | 7 | ||
| Operating Temperature Range | TA | -40 | 125 | °C | (Note 1) | 7 | |
| Storage Temperature Range | TA | -65 | 150 | °C | 7 | ||
| Current at Input Pins | -2 | 2 | mA | 3 | |||
| Current at Output and Supply Pins | -30 | 30 | mA | 3 | |||
| Max. Junction Temperature | TJ | 150 | °C | 3 | |||
| ESD protection, HBM | 2 | kV | HBM | 3 | |||
| ESD protection, CDM | 1.5 | kV | CDM | 3 | |||
| ESD protection, MM | 300 | V | MM | 3 | |||
| Thermal Resistance, 8L-SOIC | θJA | 150 | °C/W | 7 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | tin | Package: MNY = 2×3 TDFN, 8-lead * SN = Plastic SOIC (150mil Body), 8-lead | 47 |
CAD (KiCad official)
- Symbol:
MCP6N11-005E - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
mcp6n11-005e-etched.step/mcp6n11-005e-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);mcp6n11-005e.step/mcp6n11-005e.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Microchip Tech datasheet (50 pp, sha256
b08e0d74003c4ec2, retrieved 2026-10-19, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).