component
MCP6L72T-E
Public Made by Adomby adom
Microchip Tech Operational Amplifier, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
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MCP6L72T-E
Microchip Tech · Operational Amplifier · SOIC-8
MCP6L72T-E from Microchip Tech, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VOUTA | output | Analog output of op amp A, a low-impedance voltage source. |
| 2 | VINA- | input | Inverting input of op amp A, a high-impedance CMOS input with low bias currents. |
| 3 | VINA+ | input | Noninverting input of op amp A, a high-impedance CMOS input with low bias currents. |
| 4 | VSS | power_in | Negative power supply; VDD is 2.0V to 6.0V higher than VSS, and in single-supply use VSS is connected to ground. |
| 5 | VINB+ | input | Noninverting input of op amp B, a high-impedance CMOS input with low bias currents. |
| 6 | VINB- | input | Inverting input of op amp B, a high-impedance CMOS input with low bias currents. |
| 7 | VOUTB | output | Analog output of op amp B, a low-impedance voltage source. |
| 8 | VDD | power_in | Positive power supply, 2.0V to 6.0V higher than VSS, which needs bypass capacitors. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | SOIC-8 |
| Category | Operational Amplifier/Comparator |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply Voltage | VDD | 2 | 6 | V | 4 | ||
| Quiescent Current per Amplifier | IQ | 50 | 150 | 240 | µA | IO = 0 | 4 |
| Input Offset Voltage | VOS | -4 | 1 | 4 | mV | 3 | |
| Common-mode Input Voltage Range | VCMR | -0.3 | 5.3 | V | 3 | ||
| Maximum Output Voltage Swing (low) | VOL | 0.02 | V | G = +2 V/V, 0.5V input overdrive | 3 | ||
| Maximum Output Voltage Swing (high) | VOH | 4.98 | V | G = +2 V/V, 0.5V input overdrive | 3 | ||
| Operating Temperature Range | TA | -40 | 125 | °C | Note 1 | 4 | |
| Specified Temperature Range | TA | -40 | 125 | °C | 4 | ||
| Storage Temperature | -65 | 150 | °C | 3 | |||
| Junction Temperature | TJ | 150 | °C | 3 | |||
| Current at Input Pins | -2 | 2 | mA | 3 | |||
| Current at Output and Supply Pins | -30 | 30 | mA | 3 | |||
| ESD Protection on All Pins | 4 | kV | HBM | 3 | |||
| ESD Protection on All Pins | 400 | V | MM | 3 | |||
| Output Short-Circuit Current | ISC | 25 | mA | 3 | |||
| Input Offset Temperature Drift | VOS/TA | 1.3 | µV/°C | TA = -40°C to +125°C | 3 | ||
| Power Supply Rejection Ratio | PSRR | 89 | dB | 3 | |||
| Input Bias Current | IB | 1 | pA | 3 | |||
| Input Bias Current | IB | 50 | pA | TA = +85°C | 3 | ||
| Input Bias Current | IB | 2000 | pA | TA = +125°C | 3 | ||
| Input Offset Current | IOS | 1 | pA | 3 | |||
| Common-mode Rejection Ratio | CMRR | 91 | dB | VCM = -0.3V to 5.3V | 3 | ||
| DC Open-Loop Gain (large signal) | AOL | 105 | dB | VOUT = 0.2V to 4.8V, VCM =VSS | 3 | ||
| Gain Bandwidth Product | GBWP | 2 | MHz | 4 | |||
| Slew Rate | SR | 0.9 | V/µs | 4 | |||
| Phase Margin | PM | 65 | ° | G = +1 V/V | 4 | ||
| Input Noise Voltage | Eni | 4.6 | µVP-P | f = 0.1 Hz to 10 Hz | 4 | ||
| Input Noise Voltage Density | eni | 19 | nV/Hz | f = 10 kHz | 4 | ||
| Input Noise Current Density | ini | 3 | fA/Hz | f = 1 kHz | 4 | ||
| Thermal Resistance, 8-Lead SOIC | JA | 163 | °C/W | 4 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | tin | 8-Lead Plastic Small Outline (SN) - Narrow, 3.90 mm (.150 In.) Body [SOIC] A A2 | 25 |
CAD (KiCad official)
- Symbol:
MCP6L72T-E - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
mcp6l72t-e-etched.step/mcp6l72t-e-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);mcp6l72t-e.step/mcp6l72t-e.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Microchip Tech datasheet (40 pp, sha256
83578d6a64c72cd5, retrieved 2026-10-30, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).