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MCP6567T-E

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Microchip Tech Comparators, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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MCP6567T-E

Microchip Tech · Comparators · SOIC-8

MCP6567T-E from Microchip Tech, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OUTA output Comparator A open-drain CMOS digital output that requires a pull-up resistor and may be pulled up to a voltage above or below VDD for level shifting.
2 VINA- input Comparator A inverting input, a high-impedance CMOS input with low bias current, operating over the rail-to-rail range VSS - 0.3V to VDD + 0.3V.
3 VINA+ input Comparator A noninverting input, a high-impedance CMOS input with low bias current, operating over the rail-to-rail range VSS - 0.3V to VDD + 0.3V.
4 VSS power_in Negative power supply pin, 1.8V to 5.5V below VDD; in single-supply use it is connected to ground.
5 VINB+ input Comparator B noninverting input, a high-impedance CMOS input with low bias current, operating over the rail-to-rail range VSS - 0.3V to VDD + 0.3V.
6 VINB- input Comparator B inverting input, a high-impedance CMOS input with low bias current, operating over the rail-to-rail range VSS - 0.3V to VDD + 0.3V.
7 OUTB output Comparator B open-drain CMOS digital output that requires a pull-up resistor and may be pulled up to a voltage above or below VDD for level shifting.
8 VDD power_in Positive power supply pin, 1.8V to 5.5V above VSS, which needs a local bypass capacitor of 0.01 µF to 0.1 µF within 2 mm of the pin.

Key specifications

Parameter Value
Manufacturer Microchip Tech
Package SOIC-8
Category Amplifiers/Comparators
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Open-Drain Output Voltage (Absolute Maximum, referenced to VSS) 10.5 V Printed as VSS + 10.5V 3
Analog Input (VIN) (Absolute Maximum) VIN -1 V Printed as VSS, 1.0V to VDD + 1.0V; the VDD + 1.0V upper bound is not a numeric value 3
All Other Inputs and Outputs (Absolute Maximum) -0.3 V Printed as VSS, 0.3V to VDD + 0.3V; the VDD + 0.3V upper bound is not a numeric value 3
Output Short-Circuit Current (Absolute Maximum) -25 25 mA Printed as ±25 mA 3
Current at Input Pins (Absolute Maximum) -2 2 mA Printed as ±2 mA 3
Current at Output and Supply Pins (Absolute Maximum) -50 50 mA Printed as ±50 mA 3
Storage Temperature (Absolute Maximum) -65 150 °C 3
Ambient Temperature with Power Applied (Absolute Maximum) -40 125 °C 3
Junction Temperature (Absolute Maximum) 150 °C 3
ESD Protection on All Pins (HBM) 4 kV HBM; printed as 4 kV/300V (HBM/MM) 3
ESD Protection on All Pins (MM) 300 V MM; printed as 4 kV/300V (HBM/MM) 3
Supply Voltage VDD 1.8 5.5 V 3
Quiescent Current per Comparator IQ 60 100 130 µA IOUT = 0 3
Power Supply Rejection Ratio PSRR 63 70 dB VCM = VSS 3
Input Offset Voltage VOS -10 3 10 mV VCM = VSS (Note 1) 3
Input Offset Drift VOS/T 2 µV/°C VCM = VSS 3
Input Offset Current IOS 1 pA VCM = VSS 3
Input Bias Current IB 1 pA TA = +25°C, VIN- = VDD/2 3
Input Bias Current IB 60 pA TA = +85°C, VIN- = VDD/2 3
Input Bias Current IB 1500 5000 pA TA = +125°C, VIN- = VDD/2 3
Input Hysteresis Voltage VHYST 1 5 mV VCM = VSS (Notes 1, 2) 3
Input Hysteresis Linear Temp. Co. TC1 10 µV/°C 3
Input Hysteresis Quadratic Temp. Co. TC2 0.3 µV/°C2 3
Common-Mode Rejection Ratio CMRR 54 66 dB VCM = -0.3V to VDD + 0.3V, VDD = 5.5V 3
Common-Mode Rejection Ratio CMRR 50 63 dB VCM = VDD/2 to VDD + 0.3V, VDD = 5.5V 3
Common-Mode Rejection Ratio CMRR 54 65 dB VCM = -0.3V to VDD/2, VDD = 5.5V 3
Pull-up Voltage VPULL_UP 1.6 5.5 V 4
High-Level Output Current Leakage IOH_leak 1 µA Note 4 4
Low-Level Output Voltage VOL 0.6 V IOUT = 3 mA/8 mA @ VDD = 1.8V/5.5V 4
Short-Circuit Current ISC -30 30 mA Not to exceed absolute max. rating (printed as ±30 in Typ column) 4
Output Pin Capacitance COUT 8 pF 4
Propagation Delay High-to-Low, 100 mV Overdrive tPHL 56 80 ns VCM = VDD/2, VDD = 1.8V (Note 2) 4
Propagation Delay High-to-Low, 100 mV Overdrive tPHL 34 80 ns VCM = VDD/2, VDD = 5.5V 4
Output Fall Time tF 20 ns 4
Maximum Toggle Frequency fTG 4 MHz VDD = 5.5V 4
Maximum Toggle Frequency fTG 2 MHz VDD = 1.8V 4
Input Voltage Noise ENI 350 µVP-P 10 Hz to 10 MHz (Note 1) 4
Specified Temperature Range TA -40 125 °C VDD = +1.8V to +5.5V, VSS = GND 4
Operating Temperature Range TA -40 125 °C VDD = +1.8V to +5.5V, VSS = GND 4
Storage Temperature Range TA -65 150 °C 4
Thermal Resistance, 8-Lead SOIC JA 149 °C/W 4

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
contacts tin 8-Lead Plastic Small Outline (SN) - Narrow, 3.90 mm (.150 In.) Body [SOIC] A A2 36

CAD (KiCad official)

  • Symbol: MCP6567T-E
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: mcp6567t-e-etched.step / mcp6567t-e-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); mcp6567t-e.step / mcp6567t-e.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Microchip Tech datasheet (50 pp, sha256 0bf95014310c37bc, retrieved 2026-10-19, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF