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Contents

README

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MCP6562T-E

Microchip Tech · Comparators · MSOP-8

MCP6562T-E from Microchip Tech, in a MSOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OUTA output Comparator A CMOS push-pull digital output, compatible with CMOS and TTL logic and capable of rail-to-rail swing.
2 VINA- input Comparator A inverting input, a high-impedance CMOS input with low bias current and a rail-to-rail input range of VSS - 0.3V to VDD + 0.3V.
3 VINA+ input Comparator A noninverting input, a high-impedance CMOS input with low bias current and a rail-to-rail input range of VSS - 0.3V to VDD + 0.3V.
4 VSS power_in Negative power supply, connected to ground in single-supply use, with VDD 1.8V to 5.5V higher than VSS.
5 VINB+ input Comparator B noninverting input, a high-impedance CMOS input with low bias current and a rail-to-rail input range of VSS - 0.3V to VDD + 0.3V.
6 VINB- input Comparator B inverting input, a high-impedance CMOS input with low bias current and a rail-to-rail input range of VSS - 0.3V to VDD + 0.3V.
7 OUTB output Comparator B CMOS push-pull digital output, compatible with CMOS and TTL logic and capable of rail-to-rail swing.
8 VDD power_in Positive power supply, 1.8V to 5.5V higher than VSS, needing a local 0.01 µF to 0.1 µF bypass capacitor within 2 mm of the pin.

Key specifications

Parameter Value
Manufacturer Microchip Tech
Package MSOP-8
Category Operational Amplifier/Comparator
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply Voltage VDD 1.8 5.5 V 3
Quiescent Current per Comparator IQ 60 100 130 µA IOUT = 0 3
Power Supply Rejection Ratio PSRR 63 70 dB VCM = VSS 3
Input Offset Voltage VOS -10 3 10 mV VCM = VSS (Note 1) 3
Input Bias Current IB 1500 5000 pA TA = +125°C, VIN- = VDD/2 3
Input Hysteresis Voltage VHYST 1 5 mV VCM = VSS (Notes 1, 2) 3
Common-Mode Rejection Ratio CMRR 54 66 dB VCM = -0.3V to VDD + 0.3V, VDD = 5.5V 3
Common-Mode Rejection Ratio CMRR 50 63 dB VCM = VDD/2 to VDD + 0.3V, VDD = 5.5V 3
Common-Mode Rejection Ratio CMRR 54 65 dB VCM = -0.3V to VDD/2, VDD = 5.5V 3
Low-Level Output Voltage VOL 0.6 V IOUT = 3 mA/8 mA with VDD = 1.8V/5.5V (Note 3) 3
Short-Circuit Current ISC -30 30 mA Note 3 3
Propagation Delay High-to-Low, 100 mV Overdrive tPHL 56 80 ns VCM = VDD/2, VDD = 1.8V 4
Propagation Delay High-to-Low, 100 mV Overdrive tPHL 34 80 ns VCM = VDD/2, VDD = 5.5V 4
Propagation Delay Low-to-High, 100 mV Overdrive tPLH 49 80 ns VCM = VDD/2, VDD = 1.8V 4
Propagation Delay Low-to-High, 100 mV Overdrive tPLH 47 80 ns VCM = VDD/2, VDD = 5.5V 4
Propagation Delay Skew tPDS -10 10 ns 4
Specified Temperature Range TA -40 125 °C 4
Operating Temperature Range TA -40 125 °C 4
Storage Temperature Range TA -65 150 °C 4
VDD, VSS 6.5 V 3
Output Short-Circuit Current -25 25 mA 3
Current at Input Pins -2 2 mA 3
Current at Output and Supply Pins -50 50 mA 3
Storage Temperature -65 150 °C 3
Ambient Temp. with Power Applied -40 125 °C 3
Junction Temperature 150 °C 3
ESD Protection on All Pins 4 kV HBM 3
ESD Protection on All Pins 300 V MM 3
Thermal Resistance, 8-Lead MSOP θJA 211 °C/W 4
Input Offset Drift VOS/T 2 µV/°C VCM = VSS 3
Input Offset Current IOS 1 pA VCM = VSS 3
Input Bias Current IB 1 pA TA = +25°C, VIN- = VDD/2 3
Input Bias Current IB 60 pA TA = +85°C, VIN- = VDD/2 3
Input Hysteresis Linear Temp. Co. TC1 10 µV/°C 3
Input Hysteresis Quadratic Temp. Co. TC2 0.3 µV/°C2 3
Output Pin Capacitance COUT 8 pF 3
Maximum Toggle Frequency fTG 4 MHz VDD = 5.5V 4
Maximum Toggle Frequency fTG 2 MHz VDD = 1.8V 4
Output Rise Time tR 20 ns 4
Output Fall Time tF 20 ns 4
Input Voltage Noise ENI 350 µVP-P 10 Hz to 10 MHz 4

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
contacts tin 8-Lead Plastic Small Outline (SN) - Narrow, 3.90 mm (.150 In.) Body [SOIC] A A2 36

CAD (KiCad official)

  • Symbol: MCP6562T-E
  • Footprint: Package_SO:MSOP-8_3x3mm_P0.65mm
  • 3D model: MSOP-8 (KiCad packages3D, STEP)
  • 3D model files: mcp6562t-e-etched.step / mcp6562t-e-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); mcp6562t-e.step / mcp6562t-e.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Microchip Tech datasheet (50 pp, sha256 71dca2c5be18dd8b, retrieved 2026-10-27, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF