component
MCP6549-E
Public Made by Adomby adom
Microchip Tech Comparators, SOIC-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
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MCP6549-E
Microchip Tech · Comparators · SOIC-14
MCP6549-E from Microchip Tech, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OUTA | output | Digital output of comparator A; CMOS open-drain output that can be pulled up to as much as 10V above VSS for level shifting or wired-OR. |
| 2 | VINA- | input | Inverting input of comparator A, a high-impedance CMOS input with low bias current. |
| 3 | VINA+ | input | Non-inverting input of comparator A, a high-impedance CMOS input with low bias current. |
| 4 | VDD | power_in | Positive power supply, 1.6V to 5.5V above VSS, requiring a local bypass capacitor of typically 0.01 µF to 0.1 µF within 2 mm of the pin. |
| 5 | VINB+ | input | Non-inverting input of comparator B, a high-impedance CMOS input with low bias current. |
| 6 | VINB- | input | Inverting input of comparator B, a high-impedance CMOS input with low bias current. |
| 7 | OUTB | output | Digital output of comparator B; CMOS open-drain output that can be pulled up to as much as 10V above VSS for level shifting or wired-OR. |
| 8 | OUTC | output | Digital output of comparator C; CMOS open-drain output that can be pulled up to as much as 10V above VSS for level shifting or wired-OR. |
| 9 | VINC- | input | Inverting input of comparator C, a high-impedance CMOS input with low bias current. |
| 10 | VINC+ | input | Non-inverting input of comparator C, a high-impedance CMOS input with low bias current. |
| 11 | VSS | power_in | Negative power supply pin, connected to ground in typical single-supply operation; other pins operate between VSS and VDD. |
| 12 | VIND+ | input | Non-inverting input of comparator D, a high-impedance CMOS input with low bias current. |
| 13 | VIND- | input | Inverting input of comparator D, a high-impedance CMOS input with low bias current. |
| 14 | OUTD | output | Digital output of comparator D; CMOS open-drain output that can be pulled up to as much as 10V above VSS for level shifting or wired-OR. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | SOIC-14 |
| Category | Operational Amplifier/Comparator |
| Pins | 14 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply Voltage | VDD | 1.6 | 5.5 | V | VPU ≥ VDD | 2 | |
| Operating Temperature Range | TA | -40 | 125 | °C | 5 | ||
| Quiescent Current (per comparator) | IQ | 0.3 | 0.6 | 1 | µA | IOUT = 0 | 2 |
| Common Mode Rejection Ratio | CMRR | 55 | 70 | dB | VDD = 5V, VCM = -0.3V to 5.3V | 2 | |
| Common Mode Rejection Ratio | CMRR | 50 | 65 | dB | VDD = 5V, VCM = 2.5V to 5.3V | 2 | |
| Power Supply Rejection Ratio | PSRR | 63 | 80 | dB | VCM = VSS | 2 | |
| Input Offset Voltage | VOS | -7 | 1.5 | 7 | mV | VCM = VSS (Note 1) | 2 |
| Input Hysteresis Voltage | VHYST | 1.5 | 3.3 | 6.5 | mV | VCM = VSS (Note 1) | 2 |
| Input Bias Current at Temperature (E-Temp parts) | IB | 1200 | 5000 | pA | TA = +125°C, VCM = VSS (Note 3) | 2 | |
| Output Pull-Up Voltage | VPU | 1.6 | 10 | V | (Note 4) | 3 | |
| High-Level Output Current | IOH | -100 | nA | VDD = 1.6V to 5.5V, VPU = 10V (Note 4) | 3 | ||
| Short-Circuit Current | ISC | -1.5 | 1.5 | 1.5 | mA | VPU = VDD = 1.6V (Note 4) | 3 |
| Propagation Delay (High-to-Low) | tPHL | 4 | 8 | µs | 3 | ||
| Propagation Delay (Low-to-High) | tPLH | 3 | 8 | µs | Note 1 (valid for indicated load only) | 3 | |
| Absolute Maximum VDD - VSS | VDD - VSS | 7 | V | 2 | |||
| Current at Input Pins | -2 | 2 | mA | 2 | |||
| Current at Output and Supply Pins | -30 | 30 | mA | 2 | |||
| Storage Temperature Range | TA | -65 | 150 | °C | 5 | ||
| Maximum Junction Temperature | TJ | 150 | °C | 2 | |||
| ESD Protection HBM | 4 | kV | HBM, all other parts (not MCP6546U) | 2 | |||
| ESD Protection MM | 200 | V | MM, all other parts (not MCP6546U) | 2 | |||
| Thermal Resistance, 14L-SOIC | θJA | 95.3 | °C/W | 5 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | tin | P = Plastic DIP (300 mil Body), 8-lead, 14-lead SN = Plastic SOIC (150 mil Body), 8-lead | 41 |
CAD (KiCad official)
- Symbol:
MCP6549-E - Footprint:
Package_SO:SOIC-14_3.9x8.7mm_P1.27mm - 3D model: SOIC-14 (KiCad packages3D, STEP)
- 3D model files:
mcp6549-e-etched.step/mcp6549-e-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);mcp6549-e.step/mcp6549-e.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Microchip Tech datasheet (44 pp, sha256
529fbd52c82b3fe8, retrieved 2026-10-30, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).