component
MCP6496T-E
Public Made by Adomby adom
MICROCHIP TECHNOLOGY INC Global Sourcing Parts, SC-70-5. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
| Name | Last updated |
|---|---|
| docs | 14d ago |
| viewers | 14d ago |
| mcp6496t-e-etched.glb | 14d ago |
| mcp6496t-e-etched.step | 14d ago |
| mcp6496t-e-hero.glb | 14d ago |
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| mcp6496t-e.glb | 14d ago |
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| mcp6496t-e.lbr | 14d ago |
| mcp6496t-e.step | 14d ago |
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| page.json | 14d ago |
| README.md | 14d ago |
MCP6496T-E
MICROCHIP TECHNOLOGY INC · Global Sourcing Parts · SC-70-5
MCP6496T-E from MICROCHIP TECHNOLOGY INC, in a SC-70-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VOUT | output | Analog output, a low-impedance voltage source. |
| 2 | VSS | power_in | Negative power supply, connected to ground in single-supply use; VDD must be 1.8V to 5.5V higher than VSS. |
| 3 | VIN+ | power_in | Noninverting input, a high-impedance CMOS input with low bias current. |
| 4 | VIN- | power_in | Inverting input, a high-impedance CMOS input with low bias current. |
| 5 | VDD | power_in | Positive power supply, 1.8V to 5.5V above VSS, and needs bypass capacitors. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | MICROCHIP TECHNOLOGY INC |
| Package | SC-70-5 |
| Category | Global Sourcing Parts |
| Pins | 5 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input Offset Voltage | VOS | -1.6 | 1.6 | mV | TA=+25°C, VDD=+1.8V to +5.5V | 2 | |
| Power Supply Rejection Ratio | PSRR | 82 | 100 | dB | 2 | ||
| Common Mode Input Voltage Range | VCMR | -0.3 | 0.3 | V | VSS - 0.3 to VDD + 0.3 | 2 | |
| Common Mode Input Voltage Range (hot/cold) | VCMR | -0.1 | 0.1 | V | VSS - 0.1 to VDD + 0.1, TA=-40°C to +125°C, Guaranteed by Characterization | 2 | |
| Common Mode Rejection Ratio | CMRR | 66 | 92 | dB | VDD = 5.5V, VCM = -0.3V to 5.8V | 2 | |
| DC Open-Loop Gain | AOL | 105 | 130 | dB | 0.2 < VOUT < (VDD -0.2V) | 3 | |
| High-Level Output Voltage | VOH | -10 | -3.5 | mV | VDD - 10 min, VDD - 3.5 typ; VDD = 5.5V, RL = 10 kΩ | 3 | |
| High-Level Output Voltage | VOH | -50 | -30 | mV | VDD - 50 min, VDD - 30 typ; VDD = 5.5V, RL = 1 kΩ | 3 | |
| Low-Level Output Voltage | VOL | 3.5 | 10 | mV | VSS + value; VDD = 5.5V, RL = 10 kΩ | 3 | |
| Low-Level Output Voltage | VOL | 30 | 50 | mV | VSS + value; VDD = 5.5V, RL = 1 kΩ | 3 | |
| Supply Voltage | VDD | 1.8 | 5.5 | V | 3 | ||
| Quiescent Current per Amplifier | IQ | 2 | 2.5 | mA | IO = 0 | 3 | |
| Operating Temperature Range | TA | -40 | 125 | °C | Note 1 | 4 | |
| Storage Temperature Range | TA | -65 | 150 | °C | 4 | ||
| Supply Voltage VDD - VSS | VDD-VSS | 6 | V | 2 | |||
| Current at Analog Input Pins | -5 | 5 | mA | VIN+, VIN- | 2 | ||
| Maximum Junction Temperature | TJ | 150 | °C | 2 | |||
| Storage Temperature | Tstg | -65 | 150 | °C | 2 | ||
| Input Offset Drift with Temperature | ΔVOS/ΔTA | 0.6 | µV/°C | TA= -40°C to +125°C, ±0.6 typ | 2 | ||
| Input Bias Current | IB | 1 | pA | ±1 typ | 2 | ||
| Gain Bandwidth Product | GBWP | 30 | MHz | 3 | |||
| Phase Margin | PM | 53 | ° | G = +1 V/V | 3 | ||
| Slew Rate | SR | 40 | V/µs | VDD = 5.5V | 3 | ||
| Startup Time | tstart | 2 | µs | VDD = 0V to 5.5V | 3 | ||
| Thermal Resistance, 5L-SC70 | θJA | 331 | °C/W | 4 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | tin | 8-Lead Plastic Small Outline (SN) - Narrow, 3.90 mm (.150 In.) Body [SOIC] A A2 | 29 |
CAD (KiCad official)
- Symbol:
MCP6496T-E - Footprint:
Package_TO_SOT_SMD:SOT-353_SC-70-5 - 3D model: SC-70-5 (KiCad packages3D, STEP)
- 3D model files:
mcp6496t-e-etched.step/mcp6496t-e-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);mcp6496t-e.step/mcp6496t-e.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: MICROCHIP TECHNOLOGY INC datasheet (46 pp, sha256
3922358a7dcfb26f, retrieved 2026-10-23, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).