component
MCP6411T-E
Public Made by Adomby adom
Microchip Tech Operational Amplifier, SC-70-5. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
| Name | Last updated |
|---|---|
| docs | 13d ago |
| viewers | 13d ago |
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| mcp6411t-e-etched.step | 13d ago |
| mcp6411t-e-hero.glb | 13d ago |
| mcp6411t-e-hero.overlay.json | 13d ago |
| mcp6411t-e.glb | 13d ago |
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| mcp6411t-e.lbr | 13d ago |
| mcp6411t-e.step | 13d ago |
| package.json | 13d ago |
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| README.md | 13d ago |
MCP6411T-E
Microchip Tech · Operational Amplifier · SC-70-5
MCP6411T-E from Microchip Tech, in a SC-70-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VOUT | output | Analog output, a low-impedance voltage source with rail-to-rail swing. |
| 2 | VSS | power_in | Negative power supply, connected to ground in typical single-supply use. |
| 3 | VIN+ | power_in | Noninverting input, a high-impedance CMOS input with low bias current. |
| 4 | VIN- | power_in | Inverting input, a high-impedance CMOS input with low bias current. |
| 5 | VDD | power_in | Positive power supply, 1.72V to 5.5V above VSS, and needs bypass capacitors. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | SC-70-5 |
| Category | Operational Amplifier/Comparator |
| Pins | 5 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input Offset Voltage | VOS | -1 | 1 | mV | VDD = 3.5V; VCM = VDD/4 | 3 | |
| Power Supply Rejection Ratio | PSRR | 75 | 90 | dB | VCM = VDD/4 | 3 | |
| Common Mode Input Voltage Range | VCMR | -0.3 | 0.3 | V | VSS, 0.3 to VDD + 0.3 | 3 | |
| Common Mode Rejection Ratio | CMRR | 75 | 90 | dB | VDD = 5.5V, VCM = -0.3V to 5.8V | 3 | |
| Common Mode Rejection Ratio | CMRR | 65 | 85 | dB | VDD = 1.72V, VCM = -0.3V to 2.02V | 3 | |
| DC Open-Loop Gain (Large Signal) | AOL | 95 | 115 | dB | 0.2 < VOUT < (VDD -0.2V), VCM = VDD/4, VDD = 5.5V | 4 | |
| High-Level Output Voltage | VOH | -5.5 | -2 | mV | VDD = 1.72V; printed VDD, 5.5 min, VDD, 2 typ | 4 | |
| High-Level Output Voltage | VOH | -7 | -3 | mV | VDD = 5.5V; printed VDD, 7 min, VDD, 3 typ | 4 | |
| Low-Level Output Voltage | VOL | 2 | 5.5 | mV | VDD = 1.72V; printed VSS + 2 typ, VSS + 5.5 max | 4 | |
| Low-Level Output Voltage | VOL | 2.5 | 6.5 | mV | VDD = 5.5V; printed VSS + 2.5 typ, VSS + 6.5 max | 4 | |
| Supply Voltage | VDD | 1.72 | 5.5 | V | 4 | ||
| Quiescent Current | IQ | 35 | 47 | 55 | μA | IO = 0, VCM = VDD/4 | 4 |
| Operating Temperature Range | TA | -40 | 125 | °C | Note 1 | 5 | |
| Storage Temperature Range | TA | -65 | 150 | °C | 5 | ||
| Supply Voltage VDD, VSS | VDD, VSS | 6.5 | V | 3 | |||
| Current at Analog Input Pins | -2 | 2 | mA | VIN+, VIN- | 3 | ||
| Analog Input Voltage | -1 | 1 | V | VSS, 1.0V to VDD + 1.0V | 3 | ||
| All Other Inputs and Outputs | -0.3 | 0.3 | V | VSS, 0.3V to VDD + 0.3V | 3 | ||
| Current at Input Pins | -2 | 2 | mA | 3 | |||
| Current at Output and Supply Pins | -30 | 30 | mA | 3 | |||
| Maximum Junction Temperature | TJ | 150 | °C | 3 | |||
| ESD Protection HBM | 4 | kV | All pins, HBM | 3 | |||
| ESD Protection MM | 400 | V | All pins, MM | 3 | |||
| Thermal Resistance, 5L-SC70 | θJA | 331 | °C/W | 5 | |||
| Input Offset Drift with Temperature | ΔVOS/ΔTA | 3 | μV/°C | TA= -40°C to +125°C, VCM = VSS; printed ±3.0 | 3 | ||
| Input Bias Current | IB | 1 | pA | printed ±1 | 3 | ||
| Input Bias Current | IB | 20 | pA | TA = +85°C | 3 | ||
| Input Bias Current | IB | 800 | pA | TA = +125°C | 3 | ||
| Input Offset Current | IOS | 1 | pA | printed ±1 | 3 | ||
| Output Short-Circuit Current | ISC | 6 | mA | VDD = 1.72V; printed ±6 | 4 | ||
| Output Short-Circuit Current | ISC | 22 | mA | VDD = 5.5V; printed ±22 | 4 | ||
| Gain Bandwidth Product | GBWP | 1 | MHz | 4 | |||
| Phase Margin | PM | 68 | ° | G = +1 V/V | 4 | ||
| Slew Rate | SR | 0.5 | V/μs | 4 | |||
| Input Noise Voltage | Eni | 10 | μVP-P | f = 0.1 Hz to 10 Hz | 4 | ||
| Input Noise Voltage Density | eni | 38 | nV/√Hz | f = 1 kHz | 4 | ||
| Input Noise Voltage Density | eni | 32 | nV/√Hz | f = 10 kHz | 4 | ||
| Input Noise Current Density | ini | 0.6 | fA/√Hz | f = 1 kHz | 4 | ||
| EMIRR | EMIRR | 90 | dB | VIN = 100 mVPK, 1800 MHz | 4 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | gold | OT = Plastic Small Outline Transistor (SOT-23), 5-lead * Y = Nickel palladium gold manufacturing designator. Only | 31 |
CAD (KiCad official)
- Symbol:
MCP6411T-E - Footprint:
Package_TO_SOT_SMD:SOT-353_SC-70-5 - 3D model: SC-70-5 (KiCad packages3D, STEP)
- 3D model files:
mcp6411t-e-etched.step/mcp6411t-e-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);mcp6411t-e.step/mcp6411t-e.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Microchip Tech datasheet (34 pp, sha256
c511337b63b724b0, retrieved 2026-10-24, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).